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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
CAS 2012-01-19
Fukuoka Kyushu Univ. [Invited Talk] Control Techniques of Power Supply Voltage for Low Power LSI
Ken-ichi Kawasaki, Hiroshi Okano, Hisanori Fujisawa, Atsuki Inoue (Fujitsu Lab.) CAS2011-99
It is effective means that power supply voltage is lowered or turned off depending on system usage for suppressing power... [more] CAS2011-99
ICD, SDM 2010-08-26
Hokkaido Sapporo Center for Gender Equality Power Analysis and Power Reduction Techniques of a 128GFLOPS/58W SPARC64VIIIfx Processor for Peta-scale Computing
Yukihito Kawabe (Fujitsu Lab.), Hiroshi Okano, Ryuji Kan, Toshio Yoshida, Iwao Yamazaki, Hitoshi Sakurai, Mikio Hondou, Nobuyuki Matsui, Hideo Yamashita, Tatsumi Nakada, Takumi Maruyama, Takeo Asakawa (Fujitsu) SDM2010-134 ICD2010-49
We developed an 8-core SPARC64™ VIIIfx processor for Fujitsu’s next generation Super Computer. Micro-architecture ... [more] SDM2010-134 ICD2010-49
ICD, IPSJ-ARC, IPSJ-EMB 2010-01-28
Tokyo T.B.D. [Invited Talk] SPARC64TM VIIIfx:Fujitsu's Next Generation Supercomputer Processor
Hideo Yamashita, Tsuyoshi Motokurumada, Kuniki Morita, Akira Watanabe, Hiroshi Okano, Mariko Sakamoto, Yasuhiro Naoshima, Tatsumi Nakada, Naozumi Aoki, Takumi Maruyama, Takeo Asakawa, Shigeru Nagasawa, Masaki Aoki, Aiichiro Inoue (Fujitsu) ICD2009-107
We developed a brand-new SPARC V9 processor,'SPARC64TM VIIIfx' for Fujitsu’s Next Generation super computer. This proces... [more] ICD2009-107
ICD, SDM 2007-08-23
Hokkaido Kitami Institute of Technology [Panel Discussion] Dynamic Voltage & Frequency Scaling ; A Key Technology for Deep Sub-100nm SoCs !
Tadayoshi Enomoto (Chuo Univ.), Naohiko Irie (Hitachi), Hiroshi Okano (Fujitsu), Shiro Sakiyama (Matsushita), Masakatsu Nakai (Sony), Koji Nii (Renesas Technology), Masahiro Nomura (NEC), Hiroyuki Mizuno (Hitachi) SDM2007-154 ICD2007-82
 [more] SDM2007-154 ICD2007-82
ICD, SDM 2006-08-17
Hokkaido Hokkaido University A supply voltage adjustment technique for low power consumption and its application to SOCs with multiple threshold voltage CMOS
Hiroshi Okano, Tetsuyoshi Shiota, Yukihito Kawabe (Fujitsu lab.), Wataru Shibamoto (Fujitsu), Tetsutaro Hashimoto, Atsuki Inoue (Fujitsu lab.)
An energy-saving technique for SOCs using multiple threshold voltage CMOS was developed. It uses process sensors and pro... [more] SDM2006-127 ICD2006-81
ICD 2005-05-26
Hyogo Kobe Univ. A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process
Ken-ichi Kawasaki, Tetsuyoshi Shiota, Yukihito Kawabe, Wataru Shibamoto, Atsushi Sato, Tetsutaro Hashimoto, Motoaki Matsumura, Hiroshi Okano, Fumihiko Hayakawa, Shinichiro Tago, Yasuki Nakamura (Fujitsu Labs.), Hideo Miyake (FLT), Atsuhiro Suga, Hiromasa Takahashi, Atsuki Inoue (Fujitsu Labs.)
We have developed a 51.2-GOPS single-chip multi-processor integrating quadruple processors with 1.0-GB/s system-bus dire... [more] ICD2005-21
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