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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 38  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SS 2024-03-07
11:25
Okinawa
(Primary: On-site, Secondary: Online)
Development of a Framework for Implementing OTP Applications with Rust
Reiji Okamoto, Yoshiaki Takata (KUT) SS2023-51
Concurrent programming with the green threads in the programming language Rust is very costly for reasons such as the po... [more] SS2023-51
pp.13-18
QIT
(2nd)
2023-12-18
16:05
Okinawa OIST
(Primary: On-site, Secondary: Online)
Multiplexed Inter-node Communication in Distributed Quantum Computing
Soshun Naito (Univ. of Tokyo), Yasunari Suzuki, Yuuki Tokunaga (NTT)
In fault-tolerant quantum computing, a large number of physical qubits are required to construct a single logical qubit,... [more]
QIT
(2nd)
2019-11-19
12:10
Tokyo Gakushuin University Conditions for equivalence of magic state distillation protocols in prime dimension at least 5
Yasuhiro Kondo, Ryuhei Mori (Tokyo Tech)
Magic state distillation protocol is necessary for quantum fault-tolerant computation.
There are two well-known methods... [more]

CPSY, DC, IPSJ-ARC
(Joint) [detail]
2018-07-30
17:00
Kumamoto Kumamoto City International Center An Efficient Implementation Method and Development of Demonstration Environment for Byzantine Fault Tolerant Systems
Masashi Imai, Takeru Nanao, Yudai Ishikawa, Koutaro Inaba (Hirosaki Univ.) DC2018-15
Threats for mission critical systems increase every year. Traditionally, the target fault model of fault–tolerant system... [more] DC2018-15
pp.13-18
VLD, HWS
(Joint)
2018-02-28
16:55
Okinawa Okinawa Seinen Kaikan Reliability Evaluation of Mixed Error Correction Scheme for Soft-Error Tolerant Datapaths
Junghoon Oh, Mineo Kaneko (JAIST) VLD2017-102
Among several problems with miniaturization of LSIs, soft-errors are one of serious problems to make reliability worse. ... [more] VLD2017-102
pp.79-84
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-07-26
14:00
Akita Akita Atorion-Building (Akita) A Study on Implementation Method of Byzantine Fault Tolerant Systems
Takeru Nanao, Yudai Ishikawa, Masashi Imai (Hirosaki Univ.) DC2017-17
A fault tolerant system does not cause a failure even if a fault occurs. The algorithm OM has been proposed as a basic B... [more] DC2017-17
pp.7-12
VLD 2017-03-03
13:25
Okinawa Okinawa Seinen Kaikan Effect on the Chip Area of Component Adjacency Constraint for Soft-Error Tolerant Datapaths
Junghoon Oh, Mineo Kaneko (JAIST) VLD2016-129
Due to the downsizing of VLSI, reliability issues caused by soft-errors have become more explicit. Several studies in sy... [more] VLD2016-129
pp.151-156
DC, CPSY 2015-04-17
09:50
Tokyo   A Proposal of Time-Lag-Less n-Fault-Tolerant Control System
Hitoshi Iwai CPSY2015-3 DC2015-3
In a conventional multi-modular majority voting redundancy for real-time hazard control the first processing step is tha... [more] CPSY2015-3 DC2015-3
pp.13-18
SS 2015-03-09
13:25
Okinawa OKINAWAKEN SEINENKAIKAN Statistical Model Checking with Adaptive Importance Sampling
Yu Nishiki, Shoji Yuen (Nagoya Univ) SS2014-61
We propose a method for statitical model checking of error as rare events with adaptive importance sampling, where the f... [more] SS2014-61
pp.37-42
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-28
15:35
Oita B-ConPlaza Some Studies of n-Fault-Tolerant System with Voting Switches
Hitoshi Iwai VLD2014-111 DC2014-65
This paper proposes n-fault-tolerant system method of voting redundancy with multiplied function modules. In well-known ... [more] VLD2014-111 DC2014-65
pp.257-262
RECONF 2014-09-18
14:35
Hiroshima   A study of run-time fault detection mechanism for fault-tolerant FPGAs
Kentaro Fujisawa, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-19
The fault detection is very important for high reliability system LSI. In this paper, we propose a dynamic fault detecti... [more] RECONF2014-19
pp.13-18
DC 2014-02-10
16:40
Tokyo Kikai-Shinko-Kaikan Bldg. An Implementation of Fault Tolerant Systems with Mutual Reconfiguration Based on Dual-FPGA Architecture
Takuma Mori, Shoichi Ohmoto, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) DC2013-90
This work presents a design of fault tolerant systems with mutual reconfiguration based on Dual-FPGA architecture.
The ... [more]
DC2013-90
pp.67-72
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-27
15:20
Kagoshima   A controller design in high-level synthesis for multi-cycle transient fault tolerance
Yutaro Ishimori, Tatsuya Nakaso, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2013-68 DC2013-34
This work discusses a design of the controller in a multi-cycle transient
fault tolerant system. It focuses especially ... [more]
VLD2013-68 DC2013-34
pp.45-50
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
11:05
Kagoshima   [Invited Talk] Toward VLSI Reliability Enhancement by Reconfigurable Architecture
Takao Onoye, Masanori Hashimoto (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Dawood Alnajjar, Hiroaki Konoura (Osaka Univ.) VLD2013-87 CPM2013-122 ICD2013-99 CPSY2013-63 DC2013-53 RECONF2013-51
Owing to wide spread of VLSI systems, a failure of the VLSIs may lead critical issue in our daily life. Especially in so... [more] VLD2013-87 CPM2013-122 ICD2013-99 CPSY2013-63 DC2013-53 RECONF2013-51
p.183(VLD), p.81(CPM), p.81(ICD), p.27(CPSY), p.183(DC), p.69(RECONF)
CPSY 2013-11-08
15:25
Hiroshima   Fault Tolerant Backup System from File System to Object Storage
Etsutaro Akagawa, Jun Nemoto (Hitachi) CPSY2013-51
Recently, a backup technology which can backup files in a file system to a cloud storage, especially an object storage h... [more] CPSY2013-51
pp.67-71
RECONF 2012-05-29
16:00
Okinawa Tiruru (Naha Okinawa, Japan) An Efficient Fault Detection and Avoidance Technique for FPGA Interconnects
Yuuki Nishitani, Kazuki Inoue, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-13
FPGA's fault detection needs a great deal of test time as compared with ASIC because FPGAs have complex structures and p... [more] RECONF2012-13
pp.71-76
DC 2011-12-16
17:10
Hyogo   Fault-tolerant Wormhole Switching with Partial Backtrack Capability
Hiroki Kanai, Masato Kitakami (Chiba Univ.) DC2011-75
Since a parallel computer and Network-on-Chip (NoC) have many elements, their failure rate is high. Fault-tolerance is i... [more] DC2011-75
pp.39-44
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-11-29
14:50
Fukuoka Kyushu University A Binding Algorithm for Multi-cycle Fault Tolerant Datapaths
Hayato Henmi, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2010-60 DC2010-27
As the advance in semiconductor technology, the issue of soft errors, which are transient glitches caused by particle st... [more] VLD2010-60 DC2010-27
pp.25-30
IA 2009-10-30
10:50
Overseas Tsinghua University (Beijing) [Invited Talk] Challenges towards Future Internet Infrastructure
Takehisa Hayashi, Naoya Ikeda, Kazushige Arai (ALAXALA Networks) IA2009-45
The Internet is becoming a part of people's daily lives. Therefore it is affected by the macro trends of social evolutio... [more] IA2009-45
pp.5-6
DC 2009-10-20
13:00
Tokyo Kikai-Shinko-Kaikan Bldg. Deriving an Asynchronous Consensus Algorithm from a Round Model-Based Algorithm
Kazuyuki Akai, Tatsuhiro Tsuchiya, Tohru Kikuno (Osaka Univ.) DC2009-25
Consensus is a fundamental problem faced in implementing fault-tolerant
distributed systems. The design and verificati... [more]
DC2009-25
pp.19-24
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