Print edition: ISSN 0913-5685
[TOP] | [2006] | [2007] | [2008] | [2009] | [2010] | [2011] | [2012] | [Japanese] / [English]
CPM2006-129
On-Die Monitoring of Substrate Coupling for Mixed-Signal Circuit Isolation
Takumi Danjo, Daisuke Kosaka, Makoto Nagata (Kobe Univ.)
pp. 1 - 5
CPM2006-130
Study on Active Substrate Noise Cancelling Technique using Power Line di/dt Detector
Taisuke Kazama (Univ. of Tokyo), Makoto Ikeda, Kunihiro Asada (VDEC)
pp. 7 - 12
CPM2006-131
Measurement of Delay Variation Due to Inductive Coupling Noise in 90nm Global Interconnects
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.)
pp. 13 - 18
CPM2006-132
Measurement of Delay Degradation Due to Power Supply Noise and Delay Variation Estimation with Full-Chip Simulation
Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto (Osaka Univ.), Takashi Sato (Tokyo Inst. Tech.), Takao Onoye (Osaka Univ.)
pp. 19 - 23
CPM2006-133
Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform
Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.)
pp. 25 - 29
CPM2006-134
[Special Invited Talk]
Proximity Inter-chip Communications
Tadahiro Kuroda, Kiichi Niitsu (Keio Univ.)
pp. 31 - 35
CPM2006-135
[Invited Talk]
Fine electronic cuircuit pattern formation by various metal nanoparticle pastes
-- Approach by the design of metal nanoparticles --
Masami Nakamoto (Osaka Munic. Tech. Res. Inst.)
pp. 37 - 42
CPM2006-136
“In Situ” Evaluation for On-Chip Inductors Using Impedance Balance Method
Mizuki Motoyoshi, Minoru Fujishima (The Univ. of Tokyo)
pp. 43 - 48
CPM2006-137
Design of Wideband tuning VCO for TV Receiver System
Takatsugu Kamata, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.)
pp. 49 - 54
CPM2006-138
An Integrated 20-26 GHz CMOS Up-Conversion Mixer with Low Power Consumption
Yuki Kambayashi, Ivan Chee Hong Lai, Minoru Fujishima (U.T.)
pp. 55 - 60
CPM2006-139
[Special Invited Talk]
3-Dimensional Packaging Technology and Super-Chip Integration
Tetsu Tanaka, Takafumi Fukushima, Mitsumasa Koyanagi (Tohoku Univ.)
pp. 61 - 65
CPM2006-140
Local deformation and residual stress of thin chips stacked by flip chip structures
Hideo Miura, Nobuki Ueta, Yuki Sato (Tohoku Univ.)
pp. 67 - 72
CPM2006-141
Development of Packages for Ultra-violet Light-Emitting Diodes
-- Approach to high-light-extraction efficiency by Flip-Chip packages --
Iwao Mitsuishi, Shinya Nunoue, Hiroshi Yamada, Shinya Nunoue (Toshiba)
pp. 73 - 76
CPM2006-142
Ultra-Fine Pitch Cu Bumpless Interconnect for High Density System Integration
Aktisu Shigetou, Toshihiro Itoh, Tadatomo Suga (Univ. of Tokyo)
pp. 77 - 81
CPM2006-143
Modeling of Wire Bonding Process for High Performance Device
Eiichi Yamada, Masazumi Amagai (TI Japan)
pp. 83 - 86
CPM2006-144
Signal Transmission Guideline in IC Package
Kentaro Takao, Chikara Azuma, Masazumi Amagai (TIJ)
pp. 87 - 90
CPM2006-145
Failure analysis system to classify failure modes using combination of FBMs
Hitoshi Maeda, Fumihito Ohta, Michio Kuniya, Koji Fukumoto (Renesas Technology)
pp. 91 - 96
CPM2006-146
Improvement of layout analysis by connecting emission/OBIRCH analysis with CAD data
Akira Shimase, Akihito Uchikado, Mitsuaki Saeki, Shinichi Watarai, Takeshi Suzuki, Toshiyuki Majima (Renesas), Kazuhiro Hotta, Hirotoshi Terada (HPK)
pp. 97 - 102
CPM2006-147
SoC macro-block diagnosis using extracted layout information
Katsuyoshi Miura, Koji Nakamae (Osaka Univ.)
pp. 103 - 108
CPM2006-148
A Constrained Test Generation Method for Low Power Testing
Yoshiaki Tounoue, Xiaoqing Wen, Seiji Kajihara (K I T), Kohei Miyase (JST), Tatsuya Suzuki, Yuta Yamato (K I T)
pp. 109 - 114
CPM2006-149
A Note on 100x Test Data Compression for Scan-Based BIST
Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metro. Univ.), Tatsuru Matsuo, Takahisa Hiraide (Fujitsu Lab.), Hideaki Konishi, Michiaki Emori, Takashi Aikyo (Fujitsu)
pp. 115 - 120
CPM2006-150
Investigation on estimation methods of faulty parameters for analog circuits
Norio Kuji (Hachinohe National C. T.)
pp. 121 - 126
CPM2006-151
[Special Invited Talk]
Integrated RF MEMS and Its Packaging Technology
Kei Kuwabara, Norio Sato (NTT), Katsuyuki Machida (NTT-AT), Hiromu Ishii, Munenari Kawashima, Yo Yamaguchi, Kazuhiro Uehara (NTT)
pp. 127 - 129
CPM2006-152
Effects of the Board Power/Ground Layer Configuration on Simultaneous Switching Noise（SSN）and EMI
Takanobu Kushihira (MSC), Toshio Sudo (Toshiba)
pp. 131 - 136
CPM2006-153
Wid eband Decoupling Properties by the Combination of Ultra-thin Insulator and EBG Structure
Seiju Ichijo (Toshiba), Takanobu Kushihira (MSC), Toshio Sudo (Toshiba)
pp. 137 - 142
CPM2006-154
EMI Reducing Techniques for Low Voltage Differential Signaling by applying a Vertically Differential Method and Data arrangement optimization
Ayako Takagi, Masahiro Baba, Haruhiko Okumura (Toshiba Corp. R＆D Ctr.)
pp. 143 - 148
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.