Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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ICD2008-100
[Special Invited Talk]
Advancement and Prospect of Video Codec Processors for Multi Media Era
Tadayoshi Enomoto (Chuo Univ.)
pp. 1 - 6
ICD2008-101
[Invited Talk]
Recollections of Pleasure and Troubles in Analog Circuit Design
Yasuhiro Sugimoto (Chuo Univ.)
pp. 7 - 12
ICD2008-102
[Poster Presentation]
Buried Photodiode Structure for High-Speed Charge Transfer
Hiroaki Takeshita, Tomonari Sawada, Kana Ito, Tomohiro Iwahori, Shoji Kawahito (Shizuoka Univ.)
pp. 13 - 17
ICD2008-103
[Poster Presentation]
Noise reduction effect of sloped reset for Readout circuitry of image sensors
Tetsuya Iida, Shinya Itoh, Shoji Kawahito (Shizuoka Univ.)
pp. 19 - 22
ICD2008-104
[Poster Presentation]
Device Modeling of On-Chip Capacitors for Millimeter-Wave Applications
Youhei Natsukari, Minoru Fujishima (Tokyo Univ.)
pp. 23 - 25
ICD2008-105
[Poster Presentation]
Frequency Synthesizer Utilizing Injection Locking
Fan Wang, Minoru Fujishima (Tokyo Univ.)
pp. 27 - 30
ICD2008-106
[Poster Presentation]
On-Chip S-Shaped Rat-Race Balun for Millimeter-Wave Band Using W-CSP Process
Yasuo Manzawa, Chiaki Inui, Minoru Fujishima (Tokyo Univ)
pp. 31 - 35
ICD2008-107
[Poster Presentation]
60GHz CMOS Pulse Generator
Wasanthamala Badalawa, Minoru Fujishima (Tokyo Univ)
p. 37
ICD2008-108
[Poster Presentation]
Evaluation of algorithms for waveform acquisition in on-chip multi-channel monitoring
Yuuki Araga, Takushi Hashida, Makoto Nagata (Kobe Univ.)
pp. 39 - 42
ICD2008-109
[Poster Presentation]
EMC analysis of LSI
-- Evaluation and simulation of on-chip and on-board power supply noise --
Kumpei Yoshikawa, Makoto Nagata (Kobe Univ.)
pp. 43 - 46
ICD2008-110
[Poster Presentation]
Simulation Techniques for Power Supply Noise and Operation Failures in Digital LSI
Takuya Sawada, Makoto Nagata (Kobe Univ.)
pp. 47 - 50
ICD2008-111
[Poster Presentation]
Design Automated for Millimeter-Wave Mixers
Sho Ohashi, Minoru Fujishima (The Univ. of Tokyo)
pp. 51 - 52
ICD2008-112
[Poster Presentation]
A Multi-Stage 60GHz CMOS LNA Using Dual Noise-Matching Technique
Ning Li, Kenichi Okada (Tokyo Tech.), Toshihide Suzuki, Tatsuya Hirose (Fujitsu Lab), Akira Matsuzawa (Tokyo Tech.)
pp. 53 - 54
ICD2008-113
[Poster Presentation]
Design of Low-Power Medical Devices
Kenichi Matsunaga, Vo Minh Tuan, Satoshi Furuya, Takashi Kurashina, Akira Matsuzawa (Titech)
pp. 55 - 57
ICD2008-114
[Poster Presentation]
A 65fJ/b Inductive-Coupling Inter-Chip Transciever for Low-Power 3D System Integration
Kiichi Niitsu, Noriyuki Miura, Shusuke Kawai, Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.)
p. 59
ICD2008-115
[Poster Presentation]
Contact Resistance Modeling of MEMS Scanner for CMOS-MEMS Simultaneous Simulation
Yuheon Yi, Hiroyuki Fujita, Hiroshi Toshiyoshi (U. of Tokyo)
pp. 61 - 65
ICD2008-116
[Poster Presentation]
Fast optical reconfigurations of a nine-context DORGA
Mao Nakajima, Minoru Watanabe (Shizuoka Univ.)
pp. 67 - 72
ICD2008-117
[Poster Presentation]
Performance estimation for a gate array part of a dynamic optically reconfigurable gate array
Daisaku Seto, Minoru Watanabe (Shizuoka Univ.)
pp. 73 - 78
ICD2008-118
[Poster Presentation]
3.3mW 11-times CMOS Frequency Multiplier
Seong Woong Lim, Minoru Fujishima (Tokyo Univ.)
pp. 79 - 83
ICD2008-119
[Invited Talk]
Prospect of Developping AIPS Robots for Home Total Support ing Systems
-- The key is the combined technology of Software, Mechanical and Electronics --
Yoshiaki Hagihara (AIPSコンソーシアム)
pp. 85 - 90
ICD2008-120
[Invited Talk]
For those who wish to be a integrated circuit designer
Kenji Taniguchi (Osaka Univ.)
pp. 91 - 94
ICD2008-121
Fast Voltage Control Scheme with Adaptive Voltage Control Steps and Temporary Reference Voltage Overshoots for Dynamic Voltage and Frequency Scaling
Yoshifumi Ikenaga, Masahiro Nomura (NEC Electronics), Yoetsu Nakazawa (NEC Corporation), Yoshihiro Hayashi (NEC Electronics)
pp. 95 - 100
ICD2008-122
Improvement of Logic Element used in Via programmable logic device VPEX
Tomohiro Nishimoto, Masahide Kawarasaki, Eiji Hasegawa, Tomohiro Terakawa, Takeshi Fujino (Ritsumei Univ)
pp. 101 - 106
ICD2008-123
The Development of CAD Design Tools for Via Programmable Logic Device VPEX
Yuuichi Kokushou, Masahide Kawarasaki, Kouta Ishibashi, Tomohiro Nishimoto, Kazuma Kitamura (Ritsumeikan Univ), Masaya Yoshikawa (Meijyou Univ), Takeshi Fujino (Ritsumeikan Univ)
pp. 107 - 112
ICD2008-124
Asynchronous ±1 Gray-Code Adder
Shinya Matsuyama, Takashi Hisakado (Kyoto Univ.)
pp. 113 - 118
ICD2008-125
Two-stage Charge Transfer Pixel Fabricated in Standard CMOS Image Sensor Technology
Keita Yasutomi, Toshihiro Tamura, Shinya Itoh, Shoji Kawahito (Shizuoka Univ.)
pp. 119 - 124
ICD2008-126
Low-power Adiabatic Logic Circuit: Simulation and Energy Dissipation Comparison
Nazrul Anuar, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.)
pp. 125 - 130
ICD2008-127
An Inter-Die Variability Compensation Scheme for 0.42-V 486-kb FD-SOI SRAM using Substrate Control
Kosuke Yamaguchi, Hidehiro Fujiwara, Takashi Takeuchi, Yu Otake, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kove Univ)
pp. 131 - 136
ICD2008-128
Post-Silicon Programmed Body-Biasing Platform Suppressing Device Variability in 45 nm CMOS Technology
Issei Kashima, Hiroaki Suzuki, Masanori Kurimoto (Renesas Technology Corp), Tadao Yamanaka (Renesas Design), Hidehiro Takata (Renesas Technology Corp), Hiroshi Makino (Osaka Institute of Tech), Hirofumi Shinohara (Renesas Technology Corp)
pp. 137 - 142
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.