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Technical Committee on Computer Systems (CPSY) (Searched in: 2008)
Search Results: Keywords 'from:2008-04-23 to:2008-04-23'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC, CPSY | 2008-04-23 10:00 |
Tokyo | Tokyo Univ. | Perfect Classified Channel retaining DC balance Hiroki Matsuoka, Koichi Inoue, Hiroaki Nishi (Keio Univ.)  CPSY2008-1 DC2008-1 |
This paper shows an implementation for Perfect Classified Channel (PCC) that shall be encrypted at all times. PCC is Lay... [more] | CPSY2008-1 DC2008-1 pp.1-6 |
| DC, CPSY | 2008-04-23 10:30 |
Tokyo | Tokyo Univ. | A Clustering to Regularize Task Granule for Distributed Environment Hidehiro Kanemitsu, Hidenori Nakazato, Takashige Hoshiai, Yoshiyori Urano (Waseda Univ.) CPSY2008-2 DC2008-2 |
In a distributed machine environment, it is very important to control task grain size to take balance between each task... [more] |
CPSY2008-2 DC2008-2 pp.7-12 |
| DC, CPSY | 2008-04-23 11:00 |
Tokyo | Tokyo Univ. | A Lightweight Write Error Detection for Register-file Using Improved Passive WAB Hidetsugu Irie, Ken Sugimoto, Ryota Shioya (U-Tokyo), Kenichi Watanabe (Hitachi), Masahiro Goshima, Shuichi Sakai (U-Tokyo) CPSY2008-3 DC2008-3 |
Recently, it has been getting inefficient to design microprocessors with worst-case margins because of increasing proces... [more] | CPSY2008-3 DC2008-3 pp.13-18 |
| DC, CPSY | 2008-04-23 11:30 |
Tokyo | Tokyo Univ. | A Study on Reliability and Performance of FPGA-Based Fault Tolerant Systems Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) CPSY2008-4 DC2008-4 |
FPGAs (Field-Programmable Gate Arrays), which can implement arbitrary logic circuits any number of times by loading con... [more] |
CPSY2008-4 DC2008-4 pp.19-24 |
| DC, CPSY | 2008-04-23 14:00 |
Tokyo | Tokyo Univ. | Generating PROMELA Models of Fault-Tolerant Distributed Algorithms Takahiro Minamikawa, Tatsuhiro Tsuchiya, Tohru Kikuno (Osaka Univ.) CPSY2008-5 DC2008-5 |
The consensus problem is fundamental in implementing fault-tolerant distributed systems. However, designing a correct c... [more] |
CPSY2008-5 DC2008-5 pp.25-30 |
| DC, CPSY | 2008-04-23 14:30 |
Tokyo | Tokyo Univ. | Finding the Optimal Configuration of a Cascading Single-Voter TMR System Masashi Hamamatsu, Tatsuhiro Tsuchiya, Tohru Kikuno (Osaka Univ.) CPSY2008-6 DC2008-6 |
Triple modular redundancy (TMR) is a major method that is used for implementing fault tolerant systems. In TMR, a module... [more] | CPSY2008-6 DC2008-6 pp.31-36 |
| DC, CPSY | 2008-04-23 15:00 |
Tokyo | Tokyo Univ. | Current Status of Impacts and Countermeasures in Environmental Neutron Induced Failures in Electric Systems Eishi Ibe (PERL) CPSY2008-7 DC2008-7 |
Environmental neutrons is being widely recognized as the most significant source of a variety of error modes in semicon... [more] |
CPSY2008-7 DC2008-7 pp.37-42 |
| DC, CPSY | 2008-04-23 15:30 |
Tokyo | Tokyo Univ. | Influence of Untestable Hard Error on Soft Error Hardened Latches Kengo Nakashima, Kazuteru Namba, Hideo Ito (Chiba Univ) CPSY2008-8 DC2008-8 |
In recent high-density, high-speed and low-power VLSIs, soft errors frequently occur, and soft error hardened design bec... [more] | CPSY2008-8 DC2008-8 pp.43-48 |
| DC, CPSY | 2008-04-23 16:15 |
Tokyo | Tokyo Univ. | Soft Error Hardened FF Capable of Detecting Wide Error Pulse Shuangyu Ruan, Kazuteru Namba, Hideo Ito (Chiba-Univ.) CPSY2008-9 DC2008-9 |
In the recent high-density and low-power VLSIs，occurrence of soft errors becomes significant problems．Recently，soft erro... [more] | CPSY2008-9 DC2008-9 pp.49-54 |
| DC, CPSY | 2008-04-23 16:45 |
Tokyo | Tokyo Univ. | An approach to tolerating delay faults based on asynchronous circuits Tomohiro Yoneda (NII), Masashi Imai (Univ. of Tokyo), Atsushi Matsumoto, Takahiro Hanyu (Tohoku Univ.), Yuichi Nakamura (NEC) CPSY2008-10 DC2008-10 |
Recent advances in semiconductor process technologies cause new types of faults, which should be handled in order to obt... [more] | CPSY2008-10 DC2008-10 pp.55-60 |
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