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Technical Committee on Integrated Circuits and Devices (ICD)  (Searched in: 2014)

Search Results: Keywords 'from:2014-08-04 to:2014-08-04'

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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 20 of 22  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, SDM 2014-08-04
09:00
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology
Koichiro Ishibashi (UEC), Nobuyuki Sugii (LEAP), Kimiyoshi Usami (SIT), Hideharu Amano (KU), Kazutoshi Kobayashi (KIT), Cong-Kha Pham (UEC), Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita (LEAP) SDM2014-62 ICD2014-31
 [more] SDM2014-62 ICD2014-31
pp.1-4
ICD, SDM 2014-08-04
09:50
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] An Ultra-Low-Power 2-step Wake-Up Receiver for Wireless Sensor Networks
Takayuki Abe, Kazutoshi Satou, Shigeki Nakamura, Yoichiro Horiuchi, Koji Imamura (Panasonic) SDM2014-63 ICD2014-32
In sensor networks, wake-up receivers (WuRXs) attract attention as a solution to realize low-power-operation wireless se... [more] SDM2014-63 ICD2014-32
pp.5-9
ICD, SDM 2014-08-04
10:50
Hokkaido Hokkaido Univ., Multimedia Education Bldg. A 28nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor with 2GHz Cores and Low-Power 1GHz Cores
Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Hiroshi Kishibe, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori (Renesas Electronics) SDM2014-64 ICD2014-33
This paper presents power management and low power techniques of our heterogeneous quad/octa-core mobile application pro... [more] SDM2014-64 ICD2014-33
pp.11-16
ICD, SDM 2014-08-04
11:15
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Testability Improvement for 12.8 GB/s Wide IO DRAM Controller with Small Area Prebonding TSV test and 1GHz Sampled Fully Digital Noise Monitor
Takao Nomura, Ryo Mori, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Tsuyoshi Kida, Koji Nii, Sadayuki Morita (REL) SDM2014-65 ICD2014-34
We developed a Wide IO DRAM controller chip with Through Silicon Via (TSV) technology. Test circuitry is embedded in the... [more] SDM2014-65 ICD2014-34
pp.17-21
ICD, SDM 2014-08-04
11:40
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Non-Contact Connector and High Noise Immunity Transceiver for In-Vehicle LAN
Akira Okada, Atsutake Kosuge, Shu Ishizuka (Keio Univ.), Lechang Liu (Kyushu Univ.), Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.) SDM2014-66 ICD2014-35
A non-contact connector which uses electromagnetic coupling interconnects cables without stripping them in the same way ... [more] SDM2014-66 ICD2014-35
pp.23-27
ICD, SDM 2014-08-04
13:05
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] Research progress in steep slope devices and technologies to enhance ON current in TFETs
Takahiro Mori, Yukinori Morita, Shinji Migita, Wataru Mizubayashi, Koichi Fukuda, Noriyuki Miyata, Tetsuji Yasuda, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2014-67 ICD2014-36
Steep slope devices (SSDs) have attracted because of the increase demand for low-power devices. This paper reviews recen... [more] SDM2014-67 ICD2014-36
pp.29-34
ICD, SDM 2014-08-04
13:55
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] STT-MRAM Development for Embedded Cache Memory
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Koji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, Chikako Yoshida (LEAP) SDM2014-68 ICD2014-37
We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration ... [more] SDM2014-68 ICD2014-37
pp.35-38
ICD, SDM 2014-08-04
14:55
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A 90-nm Three-terminal MRAM Embedded Nonvolatile Microcontroller for Standby-Power-Critical Applications
Noboru Sakimura, Yukihide Tsuji, Ryusuke Nebashi, Hiroaki Honjo, Ayuka Morioka, Kunihiko Ishihara (NEC), Keizo Kinoshita, Shunsuke Fukami (Tohoku Univ.), Sadahiko Miura (NEC), Naoki Kasai, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu (Tohoku Univ.), Tadahiko Sugibayashi (NEC) SDM2014-69 ICD2014-38
 [more] SDM2014-69 ICD2014-38
pp.39-44
ICD, SDM 2014-08-04
15:45
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor
Jun Koyama, Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Kazuaki Ohshima, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi (SEL), Masahiro Fujita (Univ. of Tokyo), Shunpei Yamazaki (SEL) SDM2014-70 ICD2014-39
A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by mea... [more] SDM2014-70 ICD2014-39
pp.45-50
ICD, SDM 2014-08-05
09:00
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] Ultra-Low Voltage (0.1V) Operation of Threshold Voltage Self-Adjusting MOSFET and SRAM Cell
Toshiro Hiramoto, Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Takuya Saraya (Univ. of Tokyo) SDM2014-71 ICD2014-40
A new Vth self-adjusting MOSFET operating at 0.1V is proposed, where Vth automatically decreases at on-state and increas... [more] SDM2014-71 ICD2014-40
pp.51-54
ICD, SDM 2014-08-05
09:50
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Statistical Analysis of Minimum Operation Voltage (Vmin) in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo) SDM2014-72 ICD2014-41
The minimum operation voltage (Vmin) of fully depleted (FD) silicon-on-thin-BOX (SOTB) SRAM cells are measured and stati... [more] SDM2014-72 ICD2014-41
pp.55-58
ICD, SDM 2014-08-05
10:25
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Development of a Low Standby Power, Six-Transistor CMOS SRAM Employing a Single Power Supply
Ryusuke Ito (Chuo Univ.), Nobuaki Kobayashi (NUT), Tadayoshi Enomoto (Chuo Univ.) SDM2014-73 ICD2014-42
We developed and applied a new circuit, called the “Self-controllable Voltage Level (SVL)” circuit, not only to expand b... [more] SDM2014-73 ICD2014-42
pp.59-64
ICD, SDM 2014-08-05
10:50
Hokkaido Hokkaido Univ., Multimedia Education Bldg. 40nm ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU
Yoshisato Yokoyama, Yuichiro Ishii, Hidemitsu Kojima, Atsushi Miyanishi, Yoshiki Tsujihashi, Shinobu Asayama, Kazutoshi Shiba, Koji Tanaka, Tatsuya Fukuda, Koji Nii, Kazumasa Yanagisawa (Renesas) SDM2014-74 ICD2014-43
(To be available after the conference date) [more] SDM2014-74 ICD2014-43
pp.65-70
ICD, SDM 2014-08-05
11:15
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] Low-Power and High-Speed Nonvolatile FPGA by Adjacent Integration of MONOS/Logic and Novel Programming Scheme
Koichiro Zaitsu, Kosuke Tatsumura, Mari Matsumoto, Masato Oda, Shinobu Fujita, Shinichi Yasuda (Toshiba) SDM2014-75 ICD2014-44
Novel nonvolatile programmable switch for low-power and high-speed FPGA where MONOS flash is adjacently integrated to CM... [more] SDM2014-75 ICD2014-44
pp.71-76
ICD, SDM 2014-08-05
13:05
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] Oxide Semiconductor-based Transistors Formed in LSI Interconnects
Hiroshi Sunamura, Naoya Furutake, Shinobu Saito, Mitsuru Narihiro, Yoshihiro Hayashi (REL) SDM2014-76 ICD2014-45
We report on the latest progress on our proposed new transistor technology called BEOL-FET, in which we form oxide-based... [more] SDM2014-76 ICD2014-45
pp.77-82
ICD, SDM 2014-08-05
13:55
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Tr variance evaluation induced by probing pressure and its stress extraction methodology in 28nm High-K and Metal Gate process
Takeshi Okagaki, Takumi Hasegawa, Hiroyuki Takashino, Masako Fujii, Atsushi Tsuda, Koji Shibutani, Yoshinori Deguchi, Miho Yokota, Kazunori Onozawa (Renesas) SDM2014-77 ICD2014-46
 [more] SDM2014-77 ICD2014-46
pp.83-86
ICD, SDM 2014-08-05
14:20
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Circuit Design of Reconfigurable Dynamic Logic Based on Double Gate MOSFETs
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT) SDM2014-78 ICD2014-47
 [more] SDM2014-78 ICD2014-47
pp.87-92
ICD, SDM 2014-08-05
14:55
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Initial Frequency Degradation on Ring Oscillators in 65-nm SOTB Process Caused by Plasma-Induced Damage
Azusa Oshima, Ryo Kishida, Michitarou Yabuuchi, Kazutoshi Kobayashi (KIT) SDM2014-79 ICD2014-48
Reliability issues, such as plasma-induced damage (PID) and Bias Temperature
Instability (BTI), become dominant on inte... [more]
SDM2014-79 ICD2014-48
pp.93-98
ICD, SDM 2014-08-05
15:20
Hokkaido Hokkaido Univ., Multimedia Education Bldg. CMOS Relaxation Oscillator for a Real-Time Clock Application
Keishi Tsubaki, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.) SDM2014-80 ICD2014-49
This paper proposes an ultra-low power fully on-chip CMOS relaxation oscillator (ROSC) for a real-time clock application... [more] SDM2014-80 ICD2014-49
pp.99-104
ICD, SDM 2014-08-05
15:45
Hokkaido Hokkaido Univ., Multimedia Education Bldg. A Low Power , Area Efficient Frequency Calibration Technique with Shared Array Oscillator for Inductive-Coupling Transceiver
Naoki Kitazawa, Teruo Jyo, Hiroki Ishikuro (Keio Univ.) SDM2014-81 ICD2014-50
This paper presents a low power, small area Frequency Acquisition Circuit (FAC) for a pulse-based inductive coupling tra... [more] SDM2014-81 ICD2014-50
pp.105-108
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