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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 21 - 40 of 41 [Previous]  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2013-07-22
12:05
Tokyo Kikaishinkou-kaikan Bldg. The optimaization of comparator for performance improvement of superconductive random nmber generator
Shunsuke Hachiya, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2013-15
Physical random number is focused to increase the security of encrypted communication. Generation rate of the physical r... [more] SCE2013-15
pp.29-32
ICD 2013-04-12
15:30
Ibaraki Advanced Industrial Science and Technology (AIST) [Invited Lecture] Reduction of SRAM Standby Leakage utlizing All Digital Current Comparator
Noriaki Maeda, Shigenobu Komatsu, Masao Morimoto, Koji Tanaka, Yasumasa Tsukamoto, Koji Nii, Yasuhisa Shimazaki (Renesas Electronics) ICD2013-21
A high-performance and low-leakage current embedded SRAM for mobile phones is proposed. The proposed SRAM has two low-vo... [more] ICD2013-21
pp.109-114
SCE 2012-10-25
13:25
Tokyo Kikai-Shinko-Kaikan Bldg. Improvement of the integrated cryogenic current comparator
Takahiro Yamada, Masaaki Maezawa, Michitaka Maruyama, Takehiko Oe, Chiharu Urano, Nobu-hisa Kaneko (AIST), Mutsuo Hidaka, Tetsuro Satoh, Shuichi Nagasawa, Kenji Hinode (ISTEC-SRL) SCE2012-18
We improved performances of the integrated cryogenic current comparator (integrated CCC: ICCC) which was fabricated by u... [more] SCE2012-18
pp.7-12
IPSJ-SLDM, VLD 2012-05-31
10:20
Fukuoka Kitakyushu International Conference Center A Comparator Energy Model Considering Shallow Trench Isolation by Geometric Programming
Gong Chen, Yu Zhang, Bo Yang, Qing Dong, Shigetoshi Nakatake (Kitakyushu Univ.) VLD2012-8
In low power analog circuit designs, the current variation caused by the STI stress must be taken into
account. In this... [more]
VLD2012-8
pp.43-48
EMCJ, ITE-BCT 2012-03-16
14:50
Tokyo Kikai-Shinko-Kaikan Bldg. A Study on Phase Comparator Sesitivity for Low Phase-Noise PLL
Hideyasu Hobara, Yoshiki Kayano, Hiroshi Inoue (Akita Univ.) EMCJ2011-141
An UWB RF system can be used in the area of signal processing. The phase-noise of output voltage of the oscillator with ... [more] EMCJ2011-141
pp.67-72
ICD 2011-12-15
16:10
Osaka   [Poster Presentation] A Implementation Technique of a Multibit Successive Approximation Register AD Converter
Naoya Kunikata, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.) ICD2011-107
A multibit SAR(Successive Approximation Register)-ADC is presented.Recent growth of the portable device market requires ... [more] ICD2011-107
pp.41-45
SCE 2011-07-13
14:50
Tokyo Kikai-Shinko-Kaikan Bldg. High frequency characteristic of Quasi One-junction SQUID comparator
Hiromi Matsuoka, Shigeyuki Miyajima, Akira Fujimaki (Nagoya Univ.) SCE2011-7
We describe high frequency characteristic of QOS (quasi-one-junction SQUID) working as a 1-bit comparator. In transition... [more] SCE2011-7
pp.35-40
SCE 2011-01-24
13:05
Tokyo Kikai-Shinko-Kaikan Bldg [Invited Talk] An integrated cryogenic current comparator with type-II structure
Takahiro Yamada, Masaaki Maezawa, Michitaka Maruyama, Takehiko Oe, Chiharu Urano, Nobu-hisa Kaneko (AIST), Mutsuo Hidaka, Tetsuro Satoh, Shuichi Nagasawa, Kenji Hinode (ISTEC) SCE2010-41
We calculated superconductor inductances of a type-II integrated cryogenic current comparator (ICCC). First, inductances... [more] SCE2010-41
pp.29-34
SCE 2010-07-22
10:20
Tokyo Kikai-Shinko-Kaikan Bldg. An Integrated Cryogenic Current Comparator
Michitaka Maruyama, Chiharu Urano, Takehiko Oe, Masaaki Maezawa, Takahiro Yamada (AIST), Mutsuo Hidaka, Tetsuro Satoh, Shuichi Nagasawa, Kenji Hinode (ISTEC), Nobu-hisa Kaneko (AIST) SCE2010-16
We propose a small cryogenic current comparator (CCC) using a superconducting integrated circuit technology. Conventiona... [more] SCE2010-16
pp.13-18
ICD 2009-12-14
13:30
Shizuoka Shizuoka University (Hamamatsu) [Poster Presentation] Process Variation Compensation Technique for 0.5-V Body-Input Comparator
Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.) ICD2009-86
This work presents a compensation method for low-voltage body-input comparator to alleviate performance degradation due ... [more] ICD2009-86
pp.55-56
ICD 2009-12-15
15:10
Shizuoka Shizuoka University (Hamamatsu) Non-binary SAR ADC with Digital Compensation of Comparator Offset Effect
Tomohiko Ogawa (Gunma Univ), Tatsuji Mtsuura (Renesas), Haruo Kobayashi, Nobukazu Takai (Gunma Univ), Masao Hotta, Hao San (Tokyo City Univ) ICD2009-101
This paper describes techniques for creating a low-power SAR ADC with an error-correcting non-binary successive approxim... [more] ICD2009-101
pp.139-144
NLP 2009-11-13
15:55
Kagoshima   A CMOS Frequency Comparator based on Jamming Avoidance Response of Eigenmannia -- A CMOS decoder circuit extracting frequency difference from amplitudes and phases of EODs --
Daichi Fujita, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) NLP2009-111
In this paper, we implement a model of an electric fish, \textit{Eigenmannia}, that detects frequency differences betwee... [more] NLP2009-111
pp.165-170
SCE 2009-10-20
15:20
Tokyo Kikai-Shinko-Kaikan Bldg. Analysis of gray zone in QOSs
Shigeyuki Miyajima, Yosuke Higashi, Isao Nakanishi, Akira Fujimaki (Nagoya Univ.) SCE2009-22
We describe the analysis of gray zone in QOS (Quasi-One-junction SQUID) working as a 1-bit comparator. However we have a... [more] SCE2009-22
pp.31-35
SDM, ED 2009-02-26
16:30
Hokkaido Hokkaido Univ. Ultrahigh-Speed Comparator with Resonant-Tunneling Diodes
Tomohiko Ebata, Uichiro Ohmae, Kazuya Machida, Takao Waho (Sophia Univ.) ED2008-230 SDM2008-222
A comparator with resonant tunneling diodes in proposed to reduce the regeneration time. The proposed circuit has been a... [more] ED2008-230 SDM2008-222
pp.35-40
DC 2008-12-12
13:00
Yamaguchi   Optically Coupled Fail-safe Logic Gates
Daichi Kudo, Yuji Hirao, Tetsuya Kimura, Koichi Futsuhara (Nagaoka Univ. of Tech.) DC2008-59
Optically coupled fail-safe logic gates are proposed in this paper. Whereas the conventional fail-safe logic gates ba... [more] DC2008-59
pp.1-4
ED, SDM 2007-06-25
14:40
Overseas Commodore Hotel Gyeongju Chosun, Gyeongju, Korea Design of HEMT Comparators for Ultrahigh-Speed A/D Conversion
Hiroshi Watanabe,, Shunsuke Nakamura,, Takao Waho (Sophia Univ.)
HEMT comparators for ultrahigh-speed A/D converters have been investigated. In particular, the transition times of the D... [more]
EMCJ, MW 2006-10-27
11:10
Aomori Hachinohe Institute of Technology H-Plane Waveguide Eight-Port Hybrid and Its Application to Directional Coupler with Variable Coupling Factor
Katsunori Toda, Isao Ohta (Univ. Hyogo), Mitsuyoshi Kishihara (Okayama Pref. Univ.) EMCJ2006-66 MW2006-122
This paper suggests an eight-port hybrid consisting of four cruciform H-plane 3-dB hybrids connected with each other and... [more] EMCJ2006-66 MW2006-122
pp.87-91
EE 2005-11-11
14:40
Tokyo Kikai-Shinko-Kaikan Bldg. Study for hybrid power supply system and event-driven power management for node maintenance free in a sensor network
Tetsuya Shimizu, Seiichi Nakajima, Noriyoshi Yamauchi (Waseda Univ.)
In this report, we describe a power supply system and an energy-saving method of a sensor node in a sensor network. We s... [more] EE2005-41
pp.13-18
WBS 2005-10-28
14:35
Shizuoka Shizuoka University (Hamamatsu Campus) Experimental Examination of a UWB Positioning System with High Speed Comparator
Koichi Kitamura, Yukitoshi Sanada (Keio Univ.)
UWB is a wireless system whose signal occupies the frequency spectrum of several GHz. Because of the use of very short p... [more] WBS2005-44
pp.31-36
DE, DC 2005-10-17
15:30
Tokyo NTT Musashino R&D center A Main Memory Database Using a Memory Subsystem with Comparator Arrays
Jun Miyazaki (NAIST/JST)
We propose hardware supported intelligent memory access schemes for
high performance database operations. The proposed ... [more]
DE2005-131 DC2005-25
pp.37-42
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