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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 29  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICTSSL, CAS 2024-01-25
13:15
Kanagawa
(Primary: On-site, Secondary: Online)
[Invited Talk] Integrated circuits and digital calibration for high-speed high-resolution low-power A/D converters
Takashi Oshima (Hitachi) CAS2023-89 ICTSSL2023-42
Given rapid advance of AI, acquisition of high-quality digital data from analog sensor signals is crucial than ever. A h... [more] CAS2023-89 ICTSSL2023-42
pp.34-39
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
16:20
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
A multi bit PWM-DAC with calibration for quantum computing
Shunsuke Akahosh, Nobukazu Takai (KIT) VLD2023-56 ICD2023-64 DC2023-63 RECONF2023-59
We propose a structure and control method of a multi-bit PWMDAC for controlling qubits operating in a dilution refrigera... [more] VLD2023-56 ICD2023-64 DC2023-63 RECONF2023-59
pp.136-139
ICD, SDM, ITE-IST [detail] 2022-08-08
16:10
Online   A cryogenic digital-to-analog converter for high-fidelity control of large-scale qubit arrays
Ryozo Takahashi, Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2022-42 ICD2022-10
This work presents a cryogenic digital-to-analog converter (DAC) for controlling a qubits in a large-scale quantum compu... [more] SDM2022-42 ICD2022-10
pp.37-40
CAS, SIP, VLD, MSS 2022-06-16
13:00
Aomori Hachinohe Institute of Technology
(Primary: On-site, Secondary: Online)
[Special Invited Talk] Progress of RF Circuits and Mixed RF Analog-Digital Circuits for Mobile Communication Terminals
Satoshi Tanaka (Murata Manufacturing) CAS2022-5 VLD2022-5 SIP2022-36 MSS2022-5
RF circuit technology and mixed RF analog-digital circuit technology for mobile communication terminals have made great ... [more] CAS2022-5 VLD2022-5 SIP2022-36 MSS2022-5
pp.22-27
RCS, SAT
(Joint)
2019-08-22
11:15
Aichi Nagoya University Study on frequency characteristic for the measurement of the systematic errors using gating process for on-board phased array antennas
Takuya Okura, Amane Miura, Teruaki Orikasa (NICT), Shinji Senba (Axis) SAT2019-22
National Institute of Information and Communications Technology (NICT) has been currently researching and developing the... [more] SAT2019-22
pp.31-35
AP, SANE, SAT
(Joint)
2018-07-18
13:30
Hokkaido Hokkaido Univ. Study on the measurement of the systematic errors using DBF/Channelizer for on-board phased array antennas for satellite
Takuya Okura, Amane Miura, Teruaki Orikasa (NICT), Shinji Senba (Axis) AP2018-48 SAT2018-12
National Institute of Information and Communications Technology (NICT) has been currently researching and developing the... [more] AP2018-48 SAT2018-12
pp.37-41(AP), pp.7-11(SAT)
RCS, SAT
(Joint)
2017-08-18
13:50
Niigata Niigata Univ. Study on Measurement Technique of the Systematic Errors for Phased Array Satellite Antennas
Takuya Okura, Amane Miura, Teruaki Orikasa (NICT), Shinji Senba (Axis) SAT2017-38
NICT has been currently researching and developing the next-generation communication satellite that has flexibly change ... [more] SAT2017-38
pp.93-98
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-07-26
16:15
Akita Akita Atorion-Building (Akita) A Two-Temperature-Point Calibration Method for A Digital Temperature And Voltage Sensor
Yousuke Miyake, Yasuo Sato, Seiji kajihara (KIT) DC2017-19
A measurement method of a digital sensor using ring oscillators to measure a temperature and a voltage of a VLSI was pro... [more] DC2017-19
pp.19-24
CAS, NLP 2016-10-27
15:25
Tokyo   Self-Calibration and Trigger Circuit for 2-Step SAR TDC
Takashi Ida, Yuki Ozawa, Richen Jiang, Haruo Kobayashi (Gunma Univ.), Ryoji Shiota (socionext) CAS2016-48 NLP2016-74
This paper presents a 2-step successive-approximation-register time-to-digital converter (SAR TDC) architecture with its... [more] CAS2016-48 NLP2016-74
pp.55-60
ICD, ITE-IST 2013-07-05
14:25
Hokkaido San Refre Hakodate A 1.0-V 12-bit Digitally Calibrated SAR ADC Using Hybrid DAC Technique
Masanori Furuta, Hirotomo Ishii, Tomohiko Sugimoto, Toru Okawa, Masazumi Shiochi, Tetsuro Itakura (Toshiba) ICD2013-39
A 1.0-V, 12-bit, 80-MS/s two time-interleaved successive
approximation register (SAR) ADC with 1.2-V differential
full... [more]
ICD2013-39
pp.93-96
CAS 2013-01-29
10:15
Oita Beppu International Convention Center All-Digital Calibration of Time-Interleaved Analog-to-Digital Converter with Fast Convergence
Takeshi Nozaki (Fujitsu Microelectronics Solutions LTD.), Masato Yoshioka (Fujitsu Lab), Souyou Setsu (Fujitsu Microelectronics Solutions LTD.), Sadayoshi Umeda (Fujitsu Semiconductor LTD.), Sanroku Tsukamoto (Fujitsu Lab) CAS2012-81
Time-interleaved (TI) analog-to-digital converters (ADCs) use several ADCs in parallel, and are effective way to substan... [more] CAS2012-81
pp.89-94
CAS 2012-01-20
12:25
Fukuoka Kyushu Univ. [Invited Talk] Technical Trend of Digitally Assisted A/D Converters
Tatsuji Matsuura (Renesas) CAS2011-104
Abstract In spite of the numerous merits of advanced fine CMOS process/devices, when designing high performance ADCs, t... [more] CAS2011-104
pp.103-108
ICD, SDM 2010-08-26
11:25
Hokkaido Sapporo Center for Gender Equality 10bit-300MHz Double-Sampling Pipelined ADC with Digital Calibration for Memory Effects
Takuji Miki, Takashi Morie, Toshiaki Ozeki, Shiro Dosho (Panasonic) SDM2010-129 ICD2010-44
This paper describes an on-chip digital calibration technique to eliminate a memory effect error in Double-sampling Pipe... [more] SDM2010-129 ICD2010-44
pp.29-34
ICD, ITE-IST 2010-07-22
14:00
Osaka Josho Gakuen Osaka Center [Invited Talk] Digitally-Assisted Analog Test Technology -- Analog Circuit Test Technology in Nano-CMOS Era --
Haruo Kobayashi, Takahiro J. Yamaguchi (Gunma Univ.) ICD2010-27
This paper reviews current production testing issues for analog and
mixed-signal SoC, and discusses the following:
(i)... [more]
ICD2010-27
pp.37-42
ICD, ITE-IST 2010-07-23
11:05
Osaka Josho Gakuen Osaka Center On-chip background calibration of time-interleaved ADC
Takashi Oshima, Tomomi Takahashi (Hitachi) ICD2010-34
An extremely-high-speed high-resolution time-interleaved ADC is a key enabler of the next-generation applications. The g... [more] ICD2010-34
pp.79-84
CAS 2010-01-28
16:35
Kyoto Kyoudai-Kaikan Bldg. [Fellow Memorial Lecture] Study on video-frequency AD converter
Masao Hotta (Tokyo City Univ.) CAS2009-71
Analog-to-Digital converters (ADCs) for video applications have made exciting progress in miniaturization and power redu... [more] CAS2009-71
pp.43-48
ICD 2009-12-15
15:10
Shizuoka Shizuoka University (Hamamatsu) Non-binary SAR ADC with Digital Compensation of Comparator Offset Effect
Tomohiko Ogawa (Gunma Univ), Tatsuji Mtsuura (Renesas), Haruo Kobayashi, Nobukazu Takai (Gunma Univ), Masao Hotta, Hao San (Tokyo City Univ) ICD2009-101
This paper describes techniques for creating a low-power SAR ADC with an error-correcting non-binary successive approxim... [more] ICD2009-101
pp.139-144
ICD, ITE-IST 2009-10-02
11:00
Tokyo CIC Tokyo (Tamachi) [Invited Talk] AD Conversion Principles and CMOS Circuit Techniques
Atsushi Iwata (A-R-Tec) ICD2009-50
Many kinds of AD conversion schemes of Successive approximation, Flash, Pipelined, Delta Sigma, were proposed and integr... [more] ICD2009-50
pp.93-98
ICD, ITE-IST 2009-10-02
11:50
Tokyo CIC Tokyo (Tamachi) An 8-bit 600-MSps Flash ADC Using Interpolating and Background Self-Calibrating Techniques
Daehwa Paik, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa (Tokyo Inst. of Tech.) ICD2009-51
This paper describes a flash ADC using interpolation (IP) and cyclic background self-calibrating techniques. The propose... [more] ICD2009-51
pp.99-104
SIS 2009-06-11
13:30
Okinawa   Color Calibration Method by Histogram Matching with Color Space Transformation
Yasuaki Mogi, Akira Taguchi (Tokyo City Univ) SIS2009-5
A major problem of multi-camera systems is the color calibration. Even identical cameras, which have same optical proper... [more] SIS2009-5
pp.25-29
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