IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 115, Number 174

Computer Systems

Workshop Date : 2015-08-04 - 2015-08-06 / Issue Date : 2015-07-28

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Table of contents

CPSY2015-16
The Network-on-Chip Optimization By Using Of Genetic Algorithm
Daichi Murakami, Kei Hiraki (UTokyo)
pp. 1 - 6

CPSY2015-17
Design Space Exploration of Computational Photography Accelerator
Yuttakon Yuttakonkit, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 7 - 12

CPSY2015-18
Implementation and Evaluation of Near Memory Processing Architecture on FPGA
Tadahiro Edamoto, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 41 - 45

CPSY2015-19
Evaluation of ARM-EMAX tightly coupled accelerator on Zynq
Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 47 - 52

CPSY2015-20
A Feasibility Study on Implementing Micro-ITRON Task Scheduler by Wired-logic
Kouichi Araki (Godai Kaihatsu), Tomoaki Ukezono (Fukuoka Univ.)
pp. 53 - 58

CPSY2015-21
Random memory network design for Hybrid Memory Cubes
Daichi Fujiki, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
pp. 65 - 70

CPSY2015-22
Multiple-length multiplication for the GPU
Takumi Honda, Yasuaki Ito, Koji Nakano (Hiroshima Univ.)
pp. 79 - 84

CPSY2015-23
An Effective Scheduling of Data Transfer for GPU Applications
Kazuma Ono, Ryo Takeshima, Tomoaki Tsumura (Nagoya Inst. of Tech.)
pp. 85 - 90

CPSY2015-24
A Parallel Algorithm for LZW decompression, with GPU implementation
Shunji Funasaka, Yasuaki Ito, Koji Nakano (Hiroshima Univ.)
pp. 91 - 96

CPSY2015-25
Acceleration of Large-scale Interconnection Network Simulator by Using GPU
Yuki Suzuki, Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa (Utsunomiya Univ.)
pp. 97 - 102

CPSY2015-26
Testbeds of a Highly Reliable Method for CANs in High Electromagnetic Environments
Muneyuki Nakamura, Mamoru Ohara (Tokyo Metropolitan Univ.), Masayuki Arai (Nihon Univ.), Aromhack Saysanasongkham, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.)
pp. 129 - 136

CPSY2015-27
Fast single stream secure transport using AES-CTR mode
Takeshi Fukunaga, Kei Hiraki (UTokyo)
pp. 137 - 142

CPSY2015-28
Topology Alterable NoC with fault tolerance
Seiichi Tade (Keio Univ.), Michihiro Koibuchi (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.)
pp. 143 - 148

CPSY2015-29
Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation
Hiroyuki Obuchi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.)
pp. 155 - 160

CPSY2015-30
On-The-Fly Automated Storage Tiering with Proactive and Observational Migration
Kazuichi Oe (FUJITSU LABO.), Takeshi Nanri, Koji Okamura (Kyushu Univ.)
pp. 161 - 166

CPSY2015-31
Distributed Key Value Store for Resource Disaggregated Architecture
Masaki Kan, Jun Suzuki, Yuki Hayashi, Takashi Yoshikawa, Shinya Miyakawa (NEC Corp.)
pp. 167 - 172

CPSY2015-32
Fragmentation-aware Write Optimization for Flash SSDs
Shugo Ogawa, Takuya Araki (NEC)
pp. 173 - 178

CPSY2015-33
An Implementation of the Master-Worker based Parameter Server and its Application to BESOM
Meigi Rei (U of Tsukuba), Yusuke Tanimura, Yuuji Ichisugi, Hidemoto Nakada (AIST)
pp. 179 - 184

CPSY2015-34
A Cache Hierarchy in Kernel and NIC for NOSQL Acceleration
Yuta Tokusashi, Hiroki Matsutani (Keio Univ.)
pp. 185 - 190

CPSY2015-35
Data Management Method for Data Processing Middleware Using GPUs
Jun Suzuki (NEC/The University of Tokyo), Masaki Kan, Yuki Hayashi, Shinya Miyakawa (NEC), Masaru Kitsuregawa (The University of Tokyo)
pp. 191 - 196

CPSY2015-36
A Study for Data Deduplication using Block I/O Traces in Virtual Desktops
Tatsuo Kumano, Masahisa Tamura, Ken Iizawa, Toshihiro Ozawa (FLL)
pp. 197 - 201

CPSY2015-37
An Improved Algorithm for Random Topology Generation
Daisuke Takafuji, Satoshi Fujita, Koji Nakano (Hiroshima Univ.), Ikki Fujiwara, Michihiro Koibuchi (NII)
pp. 217 - 221

CPSY2015-38
Let's Solve the Order/Degree Problem to Make the Lowest-latency Interconnections
Ikki Fujiwara (NII), Satoshi Fujita, Koji Nakano (Hiroshima Univ.), Takeru Inoue (NTT), Michihiro Koibuchi (NII)
pp. 223 - 228

CPSY2015-39
Parallelization of Approximate String Matching Based on Computation of Prefix Sums
Yasuaki Mitani, Fumihiko Ino, Kenichi Hagihara (Osaka Univ.)
pp. 229 - 234

CPSY2015-40
A Study of Design Method on HW/SW Cooperative Image Processing System -- A Case on an Acceleration of Stabilization Processing of Navigational Images --
Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Manabu Inagawa (IDi), Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
pp. 235 - 240

CPSY2015-41
Performance tuning methods for out-of-core stencil computations with flash SSDs
Hiroko Midorikawa, Hideyuki Tan (Seikei Univ.)
pp. 241 - 246

CPSY2015-42
A Nonparametric Online Outlier Detector for FPGA NICs
Ami Hayashi, Yuta Tokusashi (Keio Univ.), Hiroki Matsutani (Keio Univ./JST/NII)
pp. 269 - 274

CPSY2015-43
A Layout Method of High-Radix Topology onto 3D Stacking Chips
Hiroshi Nakahara, Ryota Yasudo, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
pp. 275 - 280

CPSY2015-44
A Routing Strategy for Dynamic Link Allocation Using FSO
Tomoya Ozaki (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.)
pp. 281 - 286

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan