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Technical Committee on Integrated Circuits and Devices (ICD)  (Searched in: 2010)

Search Results: Keywords 'from:2010-12-16 to:2010-12-16'

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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 20 of 34  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2010-12-16
09:30
Tokyo RCAST, Univ. of Tokyo Elimination of Half Select Disturb in 8T-SRAM by Local Injected Electron Asymmetric Pass Gate Transistor
Kentaro Honda, Kousuke Miyaji, Shuhei Tanakamaru (Univ. of Tokyo), Shinji Miyano (STARC), Ken Takeuchi (Univ. of Tokyo) ICD2010-95
8T-SRAM cell with asymmetric pass gate transistor by local electron injection is proposed to solve half select disturb. ... [more] ICD2010-95
pp.1-6
ICD 2010-12-16
09:55
Tokyo RCAST, Univ. of Tokyo [Invited Talk] How to Write ISSCC Paper at Keio Kuroda Laboratory
Noriyuki Miura (Keio Univ.) ICD2010-96
Ten years have past since Keio University Kuroda Laboratory started in year 2000. Fourteen ISSCC papers have been publis... [more] ICD2010-96
pp.7-12
ICD 2010-12-16
10:55
Tokyo RCAST, Univ. of Tokyo [Invited Talk] Ambient Electronics and Integrated Circuits
Takayasu Sakurai (Tokyo Univ.) ICD2010-97
Electronics is penetrating more into people's daily life and contributing more to society than ever. In this ubiquitous ... [more] ICD2010-97
pp.13-18
ICD 2010-12-16
13:00
Tokyo RCAST, Univ. of Tokyo [Invited Talk] Measurement and Characteristics Validation of On-chip Signal and Power Noise -- Looking back on my doctoral course --
Yasuhiro Ogasahara (Renesas Electronics Corp.) ICD2010-98
This paper describes measurement results of inductive coupling effect on timing, and validation of interconnect model. T... [more] ICD2010-98
pp.19-24
ICD 2010-12-16
13:50
Tokyo RCAST, Univ. of Tokyo High Error Rate Compensation Architecture and ECC for SSDs with NV-RAM and NAND Flash
Kazuhide Higuchi, Mayumi Fukuda, Shuhei Tanakamaru, Ken Takeuchi (Univ. Tokyo) ICD2010-99
In this paper, we propose the adaptive codeword ECC (Error Correcting Code) for NV-RAM (Non Volatile RAM) and NAND flash... [more] ICD2010-99
pp.25-30
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] CMOS-Based Nonvolatile Flip-Flop Design and its Application to a Fractional-N PLL Frequency Synthesizer
Ge Wang, Jungyu Lee, Shoichi Masui (Tohoku Univ.) ICD2010-100
A CMOS-based nonvolatile flip-flop (NV-FF) is proposed and implemented with a 180nm technology without any additional ma... [more] ICD2010-100
pp.31-36
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] IF filter research for next generation wireless transceiver
Ben Patrick, Takayuki Konishi, Toru Kashimura, Shoichi Masui (Tohoku Univ.) ICD2010-101
 [more] ICD2010-101
pp.37-42
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Chip Development of Ubiquitous Processor
Harunobu Uchiumi, Takumi Ishihara, Naomichi Mimura, Kazuki Narita, Tatsuya Takaki, Masa-aki Fukase, Tomoaki Sato (Hirosaki Univ.) ICD2010-102
The purpose of this study is the practical implementation of a ubiquitous processor Hcgorilla. This has a double core an... [more] ICD2010-102
pp.43-48
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] A 0.5V Subthreshold CMOS Analog Amplifier with Sub-MHz Bandwidth
Takashi Mori, Tomochika Harada, Koichi Matsushita, Sumio Okuyama (Yamagata Univ.) ICD2010-103
In this paper, we present an ultra-low voltage analog amplifier based on a folded cascode opamp using subthreshold opera... [more] ICD2010-103
pp.49-53
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] A 65nm CMOS High-Speed and High-Fidelity NBTI Recovery Sensor
Takashi Matsumoto, Hiroaki Makino (Kyoto Univ.), Kazutoshi Kobayashi (Kyoto Inst. Tech.), Hidetoshi Onodera (Kyoto Univ.) ICD2010-104
We proposed an NBTI-recovery sensor with 400ns measurement delay. This sensor contains many unit cells. One unit cell in... [more] ICD2010-104
pp.55-58
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Study on CMOS R-2R Ladder for Linearity Optimization by Adjust Channel Width
Yuta Kato, Cong-Kha Pham (UEC) ICD2010-105
In this paper, we present the method of how to optimize the linear CMOS R-2R ladder by adjusting the channel width. We c... [more] ICD2010-105
pp.59-63
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] A Charge Sampling Filter with Second Order Sinc for SDR Receiver
Kenji Minefuji, Takashi Matsumoto (Waseda Univ.) ICD2010-106
A software-defined radio receiver is designed from a low power ADC perspective,exploiting programmability of window inte... [more] ICD2010-106
pp.65-70
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] A Study of Pull-in Lock Simulation in CDR-PLL
Yasuyuki Shimizu (Osaka Inst. Tech.), Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2010-107
 [more] ICD2010-107
p.71
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Comparison and Analysis of the Noise Sensitivity between LC-tank and Ring-type VCO
Ken Maruhashi, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (Osaka Inst. Tech.), Yoshio Matsuda (Kanazawa Univ.) ICD2010-108
 [more] ICD2010-108
p.73
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation
Yasumichi Takai, Masanori Hashimoto, Takao Onoye (Osaka Univ.) ICD2010-109
This paper investigates the impact of power gating structure on power supply noise using 65nm test chip measurement and ... [more] ICD2010-109
pp.75-80
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] A 0.5V 6-bit Scalable Phase Interpolator
Satoshi Kumaki, Abul Hasan Johari, Takeshi Matsubara (Keio Univ), Isamu Hayashi (STARC), Hiroki Ishikuro (Keio Univ) ICD2010-110
This paper proposes a scalable phase interpolator (PI) with dual-input inverter. A pipelined architecture is proposed to... [more] ICD2010-110
p.81
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Design of Triple-band GPS Receiver
Ikkyun Jo, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.), Takuji Ebinuma (The Univ. of Tokyo) ICD2010-111
This study describes a global positioning system(GPS) adapted fortriple bands(L1,L2,L5). This system uses doubly balance... [more] ICD2010-111
pp.83-84
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Evaluation of power noise in SRAM core
Taku Toshikawa, Tsubasa Masui, Takuya Sawada, Makoto Nagata (Kobe Univ.) ICD2010-112
Power noise of SRAM operation is evaluated with a test chip fabricated in a 90-nm CMOS technology. The chip includes on-... [more] ICD2010-112
pp.85-88
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] MOS SPICE Model Evaluation Based on gm/Id Lookup Table Methodology
Kenji Inazu, Toru Kashimura, Takayuki Konishi (Tohoku Univ.), Takana Kaho (NTT), Shoichi Masui (Tohoku Univ.) ICD2010-113
We propose a SPICE model parameter evaluation method based on gm/ID lookup table design methodology for analog/mixed-sig... [more] ICD2010-113
pp.89-94
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Design of Memory Access Controller for FU Array Accelerator
Shunsuke Shitaoka, Takuya Iwakami, Kazuhiro Yoshimura, Takashi Nakada, Yasuhiko Nakashima (NAIST) ICD2010-114
Our previously proposed FU (functional unit) array accelerator can achieve both high energy-efficiency and binary-compat... [more] ICD2010-114
pp.95-96
 Results 1 - 20 of 34  /  [Next]  
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