Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
OPE, OCS, LQE |
2022-10-20 15:45 |
Ehime |
(Primary: On-site, Secondary: Online) |
Theoretical and Experimental Investigation of Frequency Chirp Induced by Inter-Arm Imbalance in Mach-Zehnder Silicon Optical Modulators Tadashi Murao, Jun Ushida, Hiroyuki Takahashi, Masatoshi Tokushima, Akemi Shiina, Tsuyoshi Horikawa (PETRA) OCS2022-22 OPE2022-68 LQE2022-31 |
Characteristic variations caused by nonuniformities in the fabrication process are inevitable in carrier-depletion Mach–... [more] |
OCS2022-22 OPE2022-68 LQE2022-31 pp.28-33 |
OCS, OPE, LQE |
2021-10-22 16:30 |
Online |
Online |
Compact Model and Parametric Extraction for Optical Phase Shifters in Carrier-Depletion Mach-Zehnder Silicon Modulators Tadashi Murao, Jun Ushida, Hiroyuki Takahashi, Masatoshi Tokushima, Akemi Shiina, Tsuyoshi Horikawa (PETRA) OCS2021-18 OPE2021-38 LQE2021-17 |
Testing processes in silicon photonics are totally different from electronics and reduction of testing time has been an ... [more] |
OCS2021-18 OPE2021-38 LQE2021-17 pp.27-32 |
MSS, CAS, SIP, VLD |
2020-06-18 14:00 |
Online |
Online |
Optimal Design for Level-Shifter-Less Approach using Channel Length Modulation & Body Biasing Tatsuya Watanabe, Usami Kimiyoshi (SIT) CAS2020-8 VLD2020-8 SIP2020-24 MSS2020-8 |
A multi-VDD design realizes LSIs to be low power by allowing to use multiple different power supply voltages. In this de... [more] |
CAS2020-8 VLD2020-8 SIP2020-24 MSS2020-8 pp.41-46 |
HWS, VLD |
2019-02-28 10:50 |
Okinawa |
Okinawa Ken Seinen Kaikan |
Single Supply Level Shifter Circuit using body-bias Yuki Takeyoshi, Kimiyoshi Usame (SIT) VLD2018-109 HWS2018-72 |
A multi-VDD scheme exists as a technique to realize low power consumption by using different power supply voltages. A ci... [more] |
VLD2018-109 HWS2018-72 pp.97-102 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 13:10 |
Osaka |
Ritsumeikan University, Osaka Ibaraki Campus |
Feasibility studies and evaluation for Level-Shifter less design in Silicon-on-Thin-BOX (SOTB) Shunsuke Kogure, Kimiyoshi Usami (Shibaura Institute of Tech) VLD2016-47 DC2016-41 |
Level shifter is a circuit that changes the voltage amplitude of the signal. It is essential to exchange signals with di... [more] |
VLD2016-47 DC2016-41 pp.19-24 |
ICD, ITE-IST |
2011-07-21 09:30 |
Hiroshima |
Hiroshima Institute of Technology |
A Level Shifter with Logic Error Correction Circuit for Low-Voltage Digital LSIs Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.) ICD2011-21 |
A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit consists of a le... [more] |
ICD2011-21 pp.1-6 |
ICD, ITE-IST |
2010-07-23 17:25 |
Osaka |
Josho Gakuen Osaka Center |
Level Converter Circuit for Low Voltage Digital LSIs Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.) ICD2010-38 |
Supply voltage scaling in accordance with device scaling has achieved low power dissipation of CMOS LSIs. Because each c... [more] |
ICD2010-38 pp.133-138 |
VLD |
2009-03-13 13:50 |
Okinawa |
|
Performance Evaluations of nMOS Level Shifter Circuits Makoto Otsu, Shuji Tsukiyama (Chuo Univ.), Isao Shirakawa (Univ. of Hyogo), Shuji Nishi, Tomoyuki Nagai, Yasushi Kubota (Sharp Corp.) VLD2008-164 |
Driver circuits for small liquid crystal displays are usually formed on the same glass as the liquid crystal. Hence, if... [more] |
VLD2008-164 pp.225-230 |
DC, CPSY, IPSJ-SLDM, IPSJ-EMB |
2008-03-28 09:30 |
Kagoshima |
|
On Evaluation Methods of nMOS Level Shifter Circuits Makoto Otsu, Shingo Takahashi, Shuji Tsukiyama (Chuo Univ.), Masanori Hashimoto (Osaka Univ.), Isao Shirakawa (Univ. of Hyogo) DC2007-104 CPSY2007-100 |
When the process technology or required specification is changed, we face a problem of finding the optimum circuit among... [more] |
DC2007-104 CPSY2007-100 pp.121-126 |
ICD, SDM |
2007-08-23 11:10 |
Hokkaido |
Kitami Institute of Technology |
Multiphase-Output Level Shift System used in Multiphase PLL for Low Power Application Akinori Matsumoto, Shiro Sakiyama, Yusuke Tokunaga, Takashi Morie, Shiro Dosho (Matsushita) SDM2007-146 ICD2007-74 |
Low power design is essential for mobile application. For a PLL with multiphase outputs, level shifter (LS), which conve... [more] |
SDM2007-146 ICD2007-74 pp.29-34 |
ICD, ITE-IST |
2007-07-27 13:50 |
Hyogo |
|
Circuits Technologies for Wireless Power Transmission Sheet with Organic FETs and Plastic MEMS Switches Hiroshi Kawaguchi (Kobe University), Makoto Takamiya, Tsuyoshi Sekitani, Yoshio Miyamoto, Yoshiaki Noguchi, Takao Someya, Takayasu Sakurai (kawapy@godzilla.kobe-u.ac.jp) ICD2007-63 |
Design innovations to overcome the shortcomings of a wireless power transmission sheet made with plastic MEMS switches a... [more] |
ICD2007-63 pp.153-158 |