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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| MoNA, IN, CNR (Joint) [detail] |
2018-11-15 10:50 |
Saga | Karatsu Civic Exchange Plaza | Client-Based Access Network Selection for Edge Computing Kazuya Okada, Shigeru Kashihara, Yoshihisa Kondo, Nobuo Suzuki, Hiroyuki Yokoyama (ATR)  MoNA2018-23 CNR2018-20 |
Research and development of edge computing (EC) technology that provides services at edges of networks are accelerating ... [more] | MoNA2018-23 CNR2018-20 pp.7-12(MoNA), pp.13-18(CNR) |
| HWS, ISEC, SITE, ICSS, EMM, IPSJ-CSEC, IPSJ-SPT [detail] | 2018-07-26 15:25 |
Hokkaido | Sapporo Convention Center | A Study on Systematic Insertion of Hardware Trojan Based on Path Delay Akira Ito, Rei Ueno, Naofumi Homma, Takafumi Aoki (Tohoku Univ.) ISEC2018-44 SITE2018-36 HWS2018-41 ICSS2018-47 EMM2018-43 |
This paper presents a non-reversible and analytical method for inserting a path delay hardware Trojan (PDHT). The conven... [more] | ISEC2018-44 SITE2018-36 HWS2018-41 ICSS2018-47 EMM2018-43 pp.349-356 |
| VLD, HWS (Joint) |
2018-03-01 13:00 |
Okinawa | Okinawa Seinen Kaikan | An Evaluation of Graph Reduction Technique for Delay Insertion of General-Synchronous Circuit Yuki Arai, Shuji Tsukiyama (Chuo Univ.) VLD2017-110 |
In general-synchronous framework, the clock signal is distributed to each register in optimal individual timing, so that... [more] | VLD2017-110 pp.127-132 |
| MW | 2017-05-19 11:20 |
Osaka | Osaka Univ. (Seminar Room1, Osaka Univ. Kaikan) | Theoretical Relations between Unloaded Q Factor, Stored Energy, Group Delay, and Insertion Loss Derived from Coupling Matrix of Filter Circuit Masataka Ohira, Zhewang Ma (Saitama Univ.) MW2017-17 |
This paper revisits the theoretical relations between (1) unloaded Q factor of resonator, (2) reactive energy stored in ... [more] | MW2017-17 pp.55-60 |
| MoNA, ASN, IPSJ-MBL, IPSJ-UBI [detail] | 2017-03-09 16:00 |
Tokyo | University of Tokyo (Hongo Campus) | Control optimization for P2P traffic localization based on Delay insertion depending on applied services Takahiro Iijima, Hiroaki Morino (SIT) MoNA2016-39 |
P2PTV is a popular video delivery software using P2P-multicast, and it is well known that streaming traffic is shared ov... [more] | MoNA2016-39 pp.173-178 |
| VLD | 2016-03-02 13:50 |
Okinawa | Okinawa Seinen Kaikan | Acceleration of General Synchronous Circuits by Variable Latency Technique using Dynamic Timing-Error Detection Hiroshi Nakatsuka, Atsushi Takahashi (Tokyo Tech) VLD2015-140 |
General synchronous circuits are proposed as having taken the place of complete synchronous circuits and do not necessar... [more] | VLD2015-140 pp.167-172 |
| IN | 2015-01-23 17:00 |
Aichi | Nagoya International Center | Delay insertion based P2PTV traffic localization considering available bandwidt of logical links Kazato Ikeda, Takahiro Iijima, Hiroaki Morino (SIT) IN2014-119 |
Recently, The live video streaming application using P2P multicasting called P2PTV attracts attentions as a means to del... [more] | IN2014-119 pp.125-130 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 10:05 |
Oita | B-ConPlaza | An Effective Robust Design Using Improved Checkpoint Insertion Algorithm for Suspicious Timing-Error Prediction Scheme and its Evaluations Shinnosuke Yoshida, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2014-81 DC2014-35 |
As process technologies advance, process and delay variation causes a complex timing design and in-situ timing error cor... [more] | VLD2014-81 DC2014-35 pp.57-62 |
| DC | 2014-06-20 13:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Development of a delay time measurement circuit by inserting buffers Takuya Yamamoto, Yukiya Miura (Tokyo Metropolitan Univ.) DC2014-10 |
According to the scaling down, lower power design, and highly operational frequency of the device, the process variabili... [more] | DC2014-10 pp.1-6 |
| MSS, CAS, VLD, SIP | 2011-07-01 14:30 |
Okinawa | Okinawa-Ken-Seinen-Kaikan | Performance Evaluation of Various Configurations of Adder in Error Detection/Correction Circuits Kenta Ando, Atsushi Takahashi (Osaka Univ.) CAS2011-26 VLD2011-33 SIP2011-55 MSS2011-26 |
The performance of a circuit is improved by introducing error detection/correction mechanism which uses the variation of... [more] | CAS2011-26 VLD2011-33 SIP2011-55 MSS2011-26 pp.147-152 |
| VLD | 2009-03-11 16:15 |
Okinawa | A Delay Insertion Method for Clock Period Reduction with Fewer Delay Insertion in General-Synchronous Circuits Shuhei Tani, Yukihide Kohira, Atsushi Takahashi (Tokyo Inst. of Tech.) VLD2008-135 |
In general-synchronous framework, in which the clock is distributed periodically to each register but not necessarily si... [more] | VLD2008-135 pp.53-58 |
|
| ED | 2008-12-19 15:55 |
Miyagi | Tohoku Univ. | A W-band 10-Gb/s Wavelet Generator Using 0.13-um InP HEMTs for Impulse Radio Systems Yasuhiro Nakasha, Yoichi Kawano, Toshihide Suzuki (Fujitsu), Toshihiro Ohki (Fujitsu Labs.), Tsuyoshi Takahashi, Kozo Makiyama (Fujitsu), Tatsuya Hirose (Fujitsu Labs.), Naoki Hara (Fujitsu) ED2008-189 |
A wavelet generator (WG) based on simple impulse radio (IR) architecture has been developed to use for multi-gigabit com... [more] | ED2008-189 pp.27-32 |
| EA | 2008-03-07 15:55 |
Tokyo | NTT Musashino R&D Center | Sampling theorems for periodic functions and interpolation formulae for sampled data
-- (Part 2) As an extension of the interpolation via zero insertion -- Samon Oie (Onosokki) EA2007-123 |
In the previous paper [7], the author presented sampling theorems for periodic functions both in the time domain and in ... [more] | EA2007-123 pp.67-72 |
| VLD, ICD | 2008-03-07 09:15 |
Okinawa | TiRuRu | A delay balancing technique for wave-pipelining Keiichiro Sano, Jubee Tada (Yamagata Univ), Ryusuke Egawa (Touhoku Univ), Gensuke Goto (Yamagata Univ) VLD2007-156 ICD2007-179 |
Wave pipeline is a cutting-edge technology as an alternative to traditional pipeline, However, wave pipelining requires ... [more] | VLD2007-156 ICD2007-179 pp.1-6 |
| ICD, CPM | 2007-01-18 09:50 |
Tokyo | Kika-Shinko-Kaikan Bldg. | Measurement of Delay Variation Due to Inductive Coupling Noise in 90nm Global Interconnects Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.) |
Inductive coupling is becoming a design concern for global interconnects in nano-meter technologies. This paper shows me... [more] | CPM2006-131 ICD2006-173 pp.13-18 |
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