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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 14:45 |
Online | Online | Diagnosis of Switching-Induced IR Drop by On-Chip Voltage Monitors Kazuki (Kobe Univ.), Leonidas Kataselas (Aristotle Univ.), Ferenc Fodor (IMEC), Alkis Hatzopoulos (Aristotle Univ.), Makoto Nagata (Kobe Univ.), Erik Jan Marinissen (IMEC)  VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 |
On-chip monitor (OCM) circuits enable us to observe dynamic power-supply (PS) waveforms within power domains individuall... [more] | VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 pp.83-86 |
| VLD, HWS (Joint) |
2018-03-02 11:20 |
Okinawa | Okinawa Seinen Kaikan | Energy Reduction of Standard-Cell Memory Exploiting Selective Activation Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ.) VLD2017-124 |
On-chip memories have a large impact on energy-efficiency of LSI circuits. This paper discusses energy-efficient on-chip... [more] | VLD2017-124 pp.211-216 |
| MW | 2012-10-18 13:45 |
Tochigi | Utsunomiya Univ. | On-Chip Balun with High Pass Characteristic in CMOS Technology for UWB - IR Transmitter Ryosuke Hashimura, Ruibing Dong, Ramesh Pokharel, Daisuke Kanemoto, Haruichi Kanaya, Keiji Yoshida (Kyushu Univ.) MW2012-91 |
This paper presents on-chip balun with capacitors connected in series (BCCS) which is used for designing Ultra Wideband ... [more] | MW2012-91 pp.59-64 |
| ICD, SDM | 2012-08-02 14:40 |
Hokkaido | Sapporo Center for Gender Equality, Sapporo, Hokkaido | Intra/Inter Tier Substrate Noise Measurements in 3D ICs Yasumasa Takagi, Yuuki Araga, Makoto Nagata (Kobe Univ.), Geert Van der Plas, Jaemin Kim, Nikolaos Minas, Pol Marchal, Michael Libois, Antonio La Manna, Wenqi Zhang, Julien Ryckaert, Eric Beyne (IMEC) SDM2012-72 ICD2012-40 |
Substrate noise propagation among stacked dice is evaluated in a 3D test vehicle of 2 tier stacking. Each tier incorpora... [more] | SDM2012-72 ICD2012-40 pp.49-54 |
| EMCJ | 2012-04-20 14:45 |
Ishikawa | Kanazawa Univ. | Performance of Inter Decoupling by Magnetic Thin Film Noise Suppressor Integrated to LSI Chip Sho Muroga, Wataru Kodate, Yasushi Endo, Masahiro Yamaguchi (Tohoku Univ.) EMCJ2012-6 |
New measurement method for L-coupling on the basis of the IEC standard to evaluate the sheet type ferromagnetic noise su... [more] | EMCJ2012-6 pp.31-36 |
| ICD, ITE-IST | 2011-07-22 10:50 |
Hiroshima | Hiroshima Institute of Technology | A Diagnosis Testbench of Analog IP Cores Against On-Chip Environmental Disturbances Yuuki Araga, Takushi Hashida, Shinichiro Ueyama, Makoto Nagata (Kobe Univ.) ICD2011-29 |
Analog IP cores exhibit a multivariate response to dynamic variations of an operation environment, that are typically r... [more] |
ICD2011-29 pp.79-84 |
| DC | 2011-06-24 14:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
International Conference Report - VTS2011(29th IEEE VLSI Test Symposium) Kazumi Hatayama (NAIST) DC2011-11 |
This talk provide a report of VTS2011 (29th IEEE VLSI Test Symposium), which was held in Dana Point, California, USA, in... [more] | DC2011-11 pp.17-22 |
| DC, CPSY | 2011-04-12 13:50 |
Tokyo | A Case Study on Dependable Network-on-Chip Platform for Automotive Applications Chammika Mannakkara, Daihan Wang, Vijay Holimath, Tomohiro Yoneda (NII) CPSY2011-3 DC2011-3 |
This report presents our first trial to apply a Network-on-Chip (NoC) architecture to a gasoline engine control, one of... [more] |
CPSY2011-3 DC2011-3 pp.11-16 |
|
| ICD | 2010-12-16 15:10 |
Tokyo | RCAST, Univ. of Tokyo | [Poster Presentation]
Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation Yasumichi Takai, Masanori Hashimoto, Takao Onoye (Osaka Univ.) ICD2010-109 |
This paper investigates the impact of power gating structure on power supply noise using 65nm test chip measurement and ... [more] | ICD2010-109 pp.75-80 |
| ICD, ITE-IST | 2009-10-01 10:00 |
Tokyo | CIC Tokyo (Tamachi) | Evaluation and Analysis of Substrate Noise in Microprocessor Yoji Bando (Kobe Univ.), Daisuke Kosaka (A-R-Tec), Goichi Yokomizo, Kunihiko Tsuboi (STARC), Ying Shiun Li, Shen Lin (Apache), Makoto Nagata (Kobe Univ./A-R-Tec) ICD2009-35 |
An integrated power and substrate noise analysis environment targeting systems-on-chip (SoC) design was verified through... [more] | ICD2009-35 pp.11-14 |
| ICD | 2008-12-11 13:30 |
Tokyo | Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan | [Poster Presentation]
Evaluation of algorithms for waveform acquisition in on-chip multi-channel monitoring Yuuki Araga, Takushi Hashida, Makoto Nagata (Kobe Univ.) ICD2008-108 |
Multi-channel waveform monitoring system for large-scale SoCs. The system consists of probing front end circuits and a ... [more] |
ICD2008-108 pp.39-42 |
| ICD, ITE-IST | 2008-10-24 09:20 |
Hokkaido | Hokkaido University | Evaluation of algorithms for waveform acquisition in on-chip multi-channel monitoring Yuuki Araga, Takushi Hashida, Makoto Nagata (Kobe Univ.) ICD2008-80 |
Multi-channel waveform monitoring system for large-scale SoCs. The system consists of probing front end circuits and a... [more] |
ICD2008-80 pp.125-130 |
| SCE | 2007-10-17 15:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Miniaturization of a 2×2 switch cell toward realization of large-scale SFQ switches Takahiro Nakagawa (Tokyo Denki Univ), Yoshihito Hashimoto, Yoshio Kameda, Shinichi Yorozu, Mutsuo Hidaka (SRL), Kazunori Miyahara (Tokyo Denki Univ) |
We have been developing network switches as a potential application of single-flux-quantum (SFQ) circuits. In order to r... [more] | SCE2007-24 pp.35-40 |
| RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-28 16:10 |
Fukuoka | Kitakyushu International Conference Center | Test Scheduling for SoCs with Built-In Self-Repairable Memory Cores Yusuke Fukuda, Tomokazu Yoneda, Hideo Fujiwara (NAIST) |
This paper presents a power-constrained test scheduling mehtod for SoCs with built-in self repairable memories which are... [more] | VLD2006-61 DC2006-48 pp.59-64 |
| ICD, ITE-IST | 2006-07-27 12:00 |
Shizuoka | A Signal Measurement System using On-Chip Multi-Channel Waveforme Monitor Takushi Hashida, Koichiro Noguchi, Makoto Nagata (Kobe Univ.) |
This paper describes measurement system consisted of a FPGA board and on-chip multi-channel waveforme monitor circuits,... [more] |
ICD2006-64 pp.23-28 |
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