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Technical Committee on Computer Systems (CPSY)  (Searched in: 2014)

Search Results: Keywords 'from:2015-03-06 to:2015-03-06'

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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 20 of 22  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
13:00
Kagoshima   A Case for Accelerating Data Structure Sever using FPGA NIC
Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) CPSY2014-162 DC2014-88
Conventional Key-Value Store (KVS) type databases store data as pairs of key and value. A data structure server is a KVS... [more] CPSY2014-162 DC2014-88
pp.1-6
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
13:25
Kagoshima   Implementation evaluation of in-vehicle encrypted CAN communication and replay attack countermeasure technique
Masashi Nakano, Takaya Kubota, Mitsuru Shiozaki, Takeshi Fujino (Ritsumeikan Univ.) CPSY2014-163 DC2014-89
As advanced electronic in-vehicle network has recently become prevalent as can be seen in such as safety driving support... [more] CPSY2014-163 DC2014-89
pp.7-12
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
13:50
Kagoshima   A HW/SW Cooperative System Design of Stabilization Processing of Images from Networked Cameras for the Realization of an Automatic Watch System for Safe Navigation
Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Manabu Inagawa (IDi), Daichi Uetake, Mayu Fusegi, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) CPSY2014-164 DC2014-90
Accidents on vessel traffic are mainly caused by human error of deficient watch. Therefore it is expected to raise the s... [more] CPSY2014-164 DC2014-90
pp.13-18
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
14:15
Kagoshima   Advice : An application design environment for various parallel processing hardware
Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ.) CPSY2014-165 DC2014-91
We propose an application design environment: Advice (application design environment for various parallel processing har... [more] CPSY2014-165 DC2014-91
pp.19-24
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
14:50
Kagoshima   A Resource Utilization Aware Method to Improve Throughput on RMT Processor
Taro Murata, Kensuke Kaneda, Masayoshi Takasu, Keigo Mizotani, Yusuke Hatori, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-166 DC2014-92
SMT (Simultaneous MultiThreading) architecture is suitable for embedded processors which have area
constraints, it is b... [more]
CPSY2014-166 DC2014-92
pp.25-30
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
15:15
Kagoshima   Adaptive Error Correcting Code by Priority on RMT Processor
Tsukasa Matsui, Shuma Hagiwara, Keigo Mizotani, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-167 DC2014-93
In embedded real-time systems such as robots, there are requirements for real-time constraints, high throughput and low ... [more] CPSY2014-167 DC2014-93
pp.31-36
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
15:40
Kagoshima   Development of soft macro processor for embedded system
Tomoyuki Sugiyama, Takahiro Sasaki, Toshio Kondo (Mie Univ.) CPSY2014-168 DC2014-94
Recently, to achieve high performance, low energy consumption and high reliability is required in embedded systems. But ... [more] CPSY2014-168 DC2014-94
pp.37-42
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
16:05
Kagoshima   A proposal of placement optimization algorithm by introducing TSV module
Atsushi Murata, Tomohiro Inaba, Masato Yoshimi, Hidetsugu Irie, Tsutomu Yoshinaga (UEC) CPSY2014-169 DC2014-95
The performance and the power efficiency of VLSI are expected to be significantly improved by the development of 3D stac... [more] CPSY2014-169 DC2014-95
pp.43-48
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
16:40
Kagoshima   An Algorithm to Reduce Components of a Gaussian Mixture Model Considering Distribution Shape of Each Component
Naoya Yokoyama, Shuji Tsukiyama (Chuo Univ.), Masahiro Fukui (Ritsumeikan Univ.) CPSY2014-170 DC2014-96
In statistical methods, such as statistical static timing analysis (S-STA) algorithm, summation and minimum or maximum o... [more] CPSY2014-170 DC2014-96
pp.49-54
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
17:05
Kagoshima   Development of Introductory Learning Material for Embedded Systems using Plarail
Takashi Kawanami, Shunpei Kaji, Daisuke Takago, Ryoko Hayashi (KIT) CPSY2014-171 DC2014-97
Development of embedded systems requires wide range of knowledge from hardware to software so that embedded systems were... [more] CPSY2014-171 DC2014-97
pp.55-60
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
17:30
Kagoshima   A Trial Investigation System for Vulnerability on M2M Network
Kiyotaka Atsumi (ka-lab) CPSY2014-172 DC2014-98
Nowadays, M2M networks are growing up more and more, and many devices are active in M2M networks. Various devices are ex... [more] CPSY2014-172 DC2014-98
pp.61-64
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
17:55
Kagoshima   Prevention Peeping System by coordinating LED Light with Smartphones
Kouhei Sugiyama, Kyosuke Kageyama, Takeshi Kumaki, Takeshi Fujino (Ritsumei Univ.) CPSY2014-173 DC2014-99
In recent years, the diffusion of the smart phone rises rapidly, and, the much of smart phone has camera. The performanc... [more] CPSY2014-173 DC2014-99
pp.65-70
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
08:30
Kagoshima   Power optimization of low-power reconfigurable accelerator CMA-SOTB
Yu Fujita, Hayate Okuhara, Koichiro Masuyama, Hideharu Amano (Keio Univ.) CPSY2014-174 DC2014-100
(To be available after the conference date) [more] CPSY2014-174 DC2014-100
pp.71-76
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
08:55
Kagoshima   Improvements and evaluation of bias circuit control for CMOS analog circuit
Ryohei Hori (Ritsumeikan Univ.), Toshio Kumamoto (OSU), Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.) CPSY2014-175 DC2014-101
The power control using Noff (Normally-off) scheme for realization low power sensor node device is gathering a lot of at... [more] CPSY2014-175 DC2014-101
pp.77-82
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
09:20
Kagoshima   A Study on a Power Efficient Neurochip with Non-Volatile Memory
Jun Tomii, Masaaki Kondo, Hiroshi Nakamura (Univ. Tokyo) CPSY2014-176 DC2014-102
Along with the evolution of machine learning techniques, neurochips, which are designed for fast neural network processi... [more] CPSY2014-176 DC2014-102
pp.83-88
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
09:45
Kagoshima   Energy Reduction of BTB by focusing on Number of Branches per Cache Line
Hiroki Yamamoto, Ryotaro Kobayashi (TUT), Hajime Shimada (NU) CPSY2014-177 DC2014-103
Recent processors exploit Instruction Level Parallelism to improve performance, but it's limited by control dependency. ... [more] CPSY2014-177 DC2014-103
pp.89-94
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
10:20
Kagoshima   Dynamic Scheduling Algorithm for Automatically Parallelized and Power Reduced Applications on Multicore Systems
Takashi Goto, Kohei Muto, Tomohiro Hirano, Hiroki Mikami (Waseda Univ.), Uichiro Takahashi, Sakae Inoue (Fujitsu), Keiji Kimura, Hironori Kasahara (Waseda Univ.) CPSY2014-178 DC2014-104
This paper proposes a dynamic scheduling algorithm for multiple automatically parallelized or power reduced applications... [more] CPSY2014-178 DC2014-104
pp.95-100
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
10:45
Kagoshima   Real-Time Static Voltage and Frequency Scaling on RMT Processor with Instructions Per Clock Cycle Control
Kenji Yamada, Yusuke Hatori, Shuma Hagiwara, Keigo Mizotani, Masayoshi Takasu, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-179 DC2014-105
In Recent embedded real-time systems, not only high performance but also low power consumption is
required. To meet the... [more]
CPSY2014-179 DC2014-105
pp.101-106
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
13:00
Kagoshima   Study of Cost Reduction Technique for FPGA-based Control Systems by Quantitative Evaluation of Dangerous Failure Ratio
Teppei Hirotsu, Tadanobu Toba (Hitachi) CPSY2014-180 DC2014-106
FPGA is one of promising device to gain the performance of embedded systems with the progress of speed-up and cost reduc... [more] CPSY2014-180 DC2014-106
pp.119-124
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
13:25
Kagoshima   Design and Evaluation of a Floating-point Multiplier with Online Error Detection by Partial Duplication
Nobutaka Kito (Chukyo Univ.), Kazushi Akimoto, Naofumi Takagi (Kyoto Univ.) CPSY2014-181 DC2014-107
A floating-point multiplier with reduced precision error detection is proposed.
It uses a truncated multiplier for chec... [more]
CPSY2014-181 DC2014-107
pp.125-130
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