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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
QIT
(2nd)
2022-12-09
16:00
Kanagawa Keio Univ.
(Primary: On-site, Secondary: Online)
A new information criterion for quantum state estimation
Hiroshi Yano, Naoki Yamamoto (Keio Univ.)
Recently a number of efficient methods for quantum state estimation have been proposed, demanding methods for accurate s... [more]
ED 2015-07-24
15:35
Ishikawa IT Business Plaza Musashi 5F Electrical properties of SiC MOSFETs with various substrate impurity concentrations
Hiroshi Yano (NAIST/Univ. Tsukuba), Hiroto Yuki, Takashi Fuyuki (NAIST) ED2015-41
We have investigated electrical properties of n-channel MOSFETs fabricated on Si-face 4H-SiC with various substrate impu... [more] ED2015-41
pp.25-29
SDM, EID 2014-12-12
16:15
Kyoto Kyoto University Frequency dependence of Split C-V characteristics in Si-face 4H-SiC n-MOSFETs
Hiroto Yuki (NAIST), Hiroshi Yano (NAIST/Univ. Tsukuba) EID2014-33 SDM2014-128
Interface properties in 4H-SiC n-MOSFETs on Si-face were characterized by using split C-V method in the frequency range ... [more] EID2014-33 SDM2014-128
pp.103-107
SDM, EID 2014-12-12
16:30
Kyoto Kyoto University Interface Characterization of 4H-SiC MOSFETs by Single Pulse Id-Vgs Measurements
Kosuke Isono (NAIST), Hiroshi Yano (NAIST/Univ. Tsukuba) EID2014-34 SDM2014-129
SiC MOSFETs have suffered from issues such as threshold voltage instability and low channel mobility due to high interfa... [more] EID2014-34 SDM2014-129
pp.109-113
SDM 2013-12-13
10:00
Nara NAIST Silicon nanowire growth by vapor liquid solid mode using indium dots
Keigo Fukunaga, Tomoaki Hatayama, Hiroshi Yano, Naofumi Okamoto, Ayumi Tani, Yasuaki Ishikawa, Takashi Fuyuki (NAIST) SDM2013-119
A silicon nanowire (Si-NW) structure is one of the key structures to improve conversion efficiency in silicon solar cell... [more] SDM2013-119
pp.19-23
SDM 2013-12-13
17:00
Nara NAIST A Study of Threshold Voltage Instability in 4H-SiC MOSFETs with POCl3- and NO-Annealed Gate Oxides
Natsuko Kanafuji, Hiroshi Yano, Ai Osawa, Tomoaki Hatayama, Takashi Fuyuki (NAIST) SDM2013-132
4H-SiC MOSFETs are expected as low loss power devices with high blocking voltage. Threshold voltage instability is one o... [more] SDM2013-132
pp.97-100
SDM 2013-12-13
17:40
Nara NAIST Structural Change of Silicon Carbide Surface Etched by Chlorine-Trifluoride
Ryota Hori, Tomoaki Hatayama, Hiroshi Yano, Takashi Fuyuki (NAIST) SDM2013-134
Silicon carbide surface with 4°-off toward <11-20> was chemically etched by chlorine-trifluoride gas without plasma. The... [more] SDM2013-134
pp.107-112
SDM 2013-06-18
15:10
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] High performance of SiC-MOS devices by POCl3 annealing
Hiroshi Yano, Tomoaki Hatayama, Takashi Fuyuki (NAIST) SDM2013-58
Effects of phosphorus incorporation by POCl3 annealing on electrical properties of 4H-SiC MOS devices were investigated.... [more] SDM2013-58
pp.71-76
SDM 2012-12-07
10:15
Kyoto Kyoto Univ. (Katsura) Plasmaless etching of silicon carbide using chlorine based gas
Tomoaki Hatayama, Ryouta Hori, Tetsuya Tamura, Hiroshi Yano, Takashi Fuyuki (NAIST) SDM2012-116
Silicon carbide (SiC) could be etched by a plasmaless process in chlorine based ambient over 900oC. The etch pits were f... [more] SDM2012-116
pp.7-12
SDM 2012-12-07
10:45
Kyoto Kyoto Univ. (Katsura) Effects of phosphorus incorporation into SiO2/SiC interface on electrical properties of MOS capacitors fabricated on 4H-SiC(11-20)
Nao Umezawa, Hiroshi Yano, Tomoaki Hatayama, Takashi Fuyuki (NAIST) SDM2012-118
We have already reported that the interface state density of MOS capacitors on n-type 4H-SiC (0001) and (000-1) faces ca... [more] SDM2012-118
pp.19-23
SDM 2011-12-16
10:40
Nara NAIST Effects of POCl3 Annealing on SiO2/p-type 4H-SiC Interface properties
Toshimitsu Takaue, Hiroshi Yano, Tomoaki Hatayama, Takashi Fuyuki (NAIST) SDM2011-134
We have already reported that the interface state density for n-type 4H-SiC MOS structures can be greatly reduced by POC... [more] SDM2011-134
pp.11-15
SDM 2009-12-04
09:40
Nara NAIST Reduction of interface state density in 4H-SiC MOS interface by incorporation of phosphorus atoms
Dai Okamoto, Hiroshi Yano, Kenji Hirata, Tomoaki Hatayama, Takashi Fuyuki (NAIST) SDM2009-152
A change in the interface state density in 4H-SiC metal-oxide-semiconductor (MOS) structures by incorporation of various... [more] SDM2009-152
pp.5-10
SDM 2008-12-05
13:50
Kyoto Kyoto University, Katsura Campus, A1-001 Electrical Properties of Bio-Nano-Dot Floating-gate MOSFETs with Ultra-thin Tunnel Oxide
Hiroyuki Irifune, Hiroshi Yano, Yukiharu Uraoka, Takashi Fuyuki, Ichiro Yamashita (Nara Institute ofScience and Tecnology) SDM2008-189
So far, we have already developed floating gate memory devices using bio-nano-dot (BND). In this study, we fabricated an... [more] SDM2008-189
pp.27-30
SDM 2008-12-05
14:10
Kyoto Kyoto University, Katsura Campus, A1-001 Electrical properties of 4H-SiC MOS devices fabricated on C-face with NO direct oxidation
Yuki Oshiro, Dai Okamoto, Hiroshi Yano, Tomoaki Hatayama, Yukiharu Uraoka, Takashi Fuyuki (Nara Institute of Science and Technology) SDM2008-190
 [more] SDM2008-190
pp.31-35
SDM, OME 2008-04-11
14:05
Okinawa Okinawa Seinen Kaikan Degradation of Ga2o3-In2O3-Zno(GIZO) Thin Film Transistors
Mami Fujii, Hiroshi Yano, Tomoaki Hatayama, Yukiharu Uraoka, Takashi Fuyuki (NAIST), Ji Sim Jung, Jang Yeon Kwon (Sumsung Advenced Institute of Technology) SDM2008-10 OME2008-10
We have investigated a degradation of Ga2O3-In2O3-ZnO(GIZO)thin film transistor under DC stress. For a positive gate bia... [more] SDM2008-10 OME2008-10
pp.47-50
SDM 2007-12-14
11:40
Nara Nara Institute Science and Technology Charge-Discharge Characteristics of Bio-Nano Dot Floating Gate MOS Devices with Ultrathin Tunnnel Oxide
Tomoki Umeda, Hiroshi Yano, Atsushi Miura, Yukiharu Uraoka, Takashi Fuyuki (NAIST), Ichiro Yamashita (NAIST,Matsushita Electric Industrial Co.)
 [more]
SDM 2007-12-14
16:40
Nara Nara Institute Science and Technology Charge-Pumping Measurement on 4H-SiC nMOSFETs and pMOSFETs
Dai Okamoto, Hiroshi Yano, Tomoaki Hatayama, Yukiharu Uraoka, Takashi Fuyuki (Nara Inst. Sci. Tech.) SDM2007-234
Charge-pumping measurements were conducted on n-channel and p-channel 4H-SiC MOSFET’s with and without NO annealing. The... [more] SDM2007-234
pp.51-54
ED 2007-06-15
13:00
Toyama Toyama Univ. 0.10 um Ion-Implanted GaAs MESFETs with Low Cost Production Process
Masataka Watanabe, Daiji Fukushi, Hiroshi Yano, Shigeru Nakajima (Eudyna Devices) ED2007-31
We have successfully fabricated 0.1 &micro;m gate GaAs MESFETs using a low cost process. The result was obtained from op... [more] ED2007-31
pp.1-5
SDM 2007-06-07
16:45
Hiroshima Hiroshima Univ. ( Faculty Club) Effects of High-Pressure H2O Vapor annealing on SiO2/4H-SiC Interface Properties and MOSFET Performance
Hiroshi Yano, Daisuke Takeda, Tomoaki Hatayama, Yukiharu Uraoka, Takashi Fuyuki (NAIST) SDM2007-38
High-pressure H2O vapor annealing was performed for 4H-SiC MOS structures to modify interface properties and MOSFET perf... [more] SDM2007-38
pp.37-42
PRMU 2005-10-27
16:00
Miyagi Tohoku Univ. [Special Talk] English title unknown
Junichi Sakaki (Matsushita Electric), Shizuo Sakamoto (NEC), Hiroshi Yano (Omuron), Osamu Kanda (Matsushita Electric), Morito Shiohara (Fujitsu Lab), Hiroshi Sukegawa (Toshiba), Yoshiaki Isobe (Hitachi), Satoshi Haruyama (NTT Data), Shinichi Murata (OKI), Masahiro Yoshizawa (NTT), Seiji Hirano (Toppan Printing), Hideki Murota (Dai Nippon Printing), Satoshi Seto (Fujifilm), Koji Matsunaka (Konica Minolta), Manabu Yamakoshi (National Printing Bureau)
 [more] PRMU2005-92
pp.51-56
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