Online edition: ISSN 2432-6380
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VLD2021-76
Improved placement-method of standard cells considering parallel routing
Takeru Furuyashiki, Kunihiro Fujiyoshi (TUAT)
pp. 1 - 6
VLD2021-77
Bottleneck Channel Routing to Reduce the Area of Analog VLSI
Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi (Tokyo Tech), Yukichi Todoroki, Makoto Minami (Jedat)
pp. 7 - 12
VLD2021-78
A Heuristic Scheduling Algorithm with Variable-Cycle Approximate Operations in High-Level Synthesis
Koyu Ohata, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama (Ritsumeikan Univ.)
pp. 13 - 18
VLD2021-79
Datapath Synthesis Considering Temperature Dependent Timing Skew
Mineo Kaneko (JAIST)
pp. 19 - 24
VLD2021-80
Attribute-based Encryption Acceleration by Pairing Engine Hardware on FPGA
Anawin Opasatian, Makoto Ikeda (EEIS, The University of Tokyo)
pp. 25 - 30
VLD2021-81
Design and Measurement of Crypto Processor for Post Quantum Cryptography CRYSTALS-Kyber
Taishin Shimada, Makoto Ikeda (Univ. of Tokyo)
pp. 31 - 36
VLD2021-82
An efficient scheme of homomorphic encryption for stochastic computing and its performance evaluation
Ryusuke Koseki, Rei Ueno, Akira Ito, Naofumi Homma (Tohoku Univ.)
pp. 37 - 42
VLD2021-83
[Memorial Lecture]
An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers
Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.)
p. 43
VLD2021-84
[Memorial Lecture]
DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification
Dehua Liang, Jun Shiomi, Noriyuki Miura (Osaka Univ.), Hiromitsu Awano (Kyoto Univ.)
p. 44
VLD2021-85
Measurement Results of Nonvolatile Flip-Flops Using FiCC for IoT Processors with Intermittent Operations
Yuki Abe, Kazutoshi Kobayashi (KIT), Hiroyuki Ochi (Ritsumeikan Univ.)
pp. 45 - 50
VLD2021-86
MTJ-based non-volatile SRAM circuit with Approximate Image-data Storing for energy saving
Hisato Miyauchi, Kimiyoshi Usami (SIT)
pp. 51 - 56
VLD2021-87
Low-Energy and Fast Inference Method for Spiking Neural Networks Using Dynamic Threshold Adjustment
Takehiro Habara, Hiromitsu Awano (Kyoto Univ.)
pp. 57 - 62
VLD2021-88
High-throughput In-Memory Accelerator for Binarized Neural Network based on 8T-SRAM
Hiroto Tagata, Hiromitsu Awano (Kyoto Univ.)
pp. 63 - 68
VLD2021-89
A Force-Haptic Guided Control System for Smooth Manipulation of Flexible Objects by Teleoperated Robots
Satoko Iida, Hiromitu Awano (Kyoto Univ.)
pp. 69 - 74
VLD2021-90
AmoebaSAT-based Efficient Accelerator for Autonomous Driving Application
Yusuke Inuma, Yuko Hara-Azumi (Tokyo Tech)
pp. 75 - 80
VLD2021-91
A Study on Interface Circuits Using Click Element Between Synchronous-asynchronous Domains
Shogo Semba, Hiroshi Saito (UoA)
pp. 81 - 86
VLD2021-92
Wafer-Level Characteristic Variation Modeling with Considering Discontinuous Effect Caused by Manufacturing Equipment
Takuma Nagao (National Institute of Technology (KOSEN)), Michihiro Shintani (Nara Institute of Science and Technology), Ken'ichi Yamaguchi, Hiroshi Iwata (National Institute of Technology (KOSEN)), Tomoki Nakamura, Masuo Kajiyama, Makoto Eiki (SCK), Michiko Inoue (Nara Institute of Science and Technology)
pp. 87 - 92
VLD2021-93
Evaluation of leakage-based LR-PUF's resistance to machine learning attacks
Tomoaki Oikawa, Kimiyoshi Usami (SIT)
pp. 93 - 98
VLD2021-94
Evaluation of a Lightweight Cryptographic Finalist on SROS2
Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)
pp. 99 - 104
VLD2021-95
A Method for Automatic Test Pattern Generation using an SMT Solver for HDL Code
Ryoichi Isawa, Nobuyuki Kanaya, Yoshitada Fujiwara, Tatsuta Takehisa, Hayato Ushimaru, Dai Arisue, Daisuke Makita, Satoshi Mimura, Daisuke Inoue (NICT)
pp. 105 - 110
VLD2021-96
Implementation Evaluation of Glitch PUF Using a Low-Latency Cryptography MANTIS
Kosuke Hamaguchi, Shu Takemoto, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)
pp. 111 - 116
VLD2021-97
A Study on Small Area Circuits for CMOS Image Sensors with Message Authentication Codes (1)
-- Drive Circuit and Pixel Array Configuration --
Yoshihiro Akamatsu, Hiroaki Ogawa, Tatsuya Oyama, Hayato Tatsuno, Yu Sekioka, Shunsuke Okura, Takeshi Fujino (Ritsumeikan Univ)
pp. 117 - 122
VLD2021-98
A Study on Small Area Circuits for CMOS Image Sensor with Message Authentication codes (2)
-- Code generation circuit --
Yu Sekioka, Hiroaki Ogawa, Hayato Tatsuno, Tatsuya Oyama, Yoshihiro Akamatsu, Shunsuke Okura, Takeshi Fujino (Ritsumeikan Univ)
pp. 123 - 128
VLD2021-99
A Study on Security Evaluation of COSO-based TRNG
Ryuichi Minagawa, Kotaro Hayashi, Naoya Torii (Soka Univ)
pp. 129 - 134
VLD2021-100
Evaluation of Side-channel Leaks Specific to Unrolled AES Hardware
Ayano Nakashima, Rei Ueno, Naofumi Homma (Tohoku Univ.)
pp. 135 - 140
VLD2021-101
Bypassing Isolated Execution on RISC-V Keystone using Fault Injection
Shoei Nashimoto, Daisuke Suzuki (Mitsubishi Electric), Rei Ueno, Naofumi Homma (Tohoku Univ.)
pp. 141 - 146
VLD2021-102
Evaluation Method for EM Information Leakage from Speakerphone Using Voice Frequency Spectrum Analysis
Hiroyuki Ueda, Seiya Takano, Daisuke Fujimoto, Yuichi Hayashi (NAIST)
pp. 147 - 152
VLD2021-103
Fundamental Evaluation Method for EM Information Leakage Caused by Hardware Trojans on Signal Cables
-- Impact of Modulation Factor and Emission Intensity --
Taiga Yukawa, Shugo Kaji, Daisuke Fujimoto, Yuichi Hayashi (NAIST)
pp. 153 - 157
VLD2021-104
Physical Spoofing Attack on LiDAR-based Object Detection and Its Demonstration
Yuki Fukatsu, Ryuuya Ichinose, Shinsei Ueda, Ataru Kubo, Naoki Yoshida, Tsutomu Matsumoto (Yokohama National Univ.)
pp. 158 - 163
VLD2021-105
Development of a Test Environment for Attack-Resistance Evaluation of Matrix Direct ToF Lidar
Masato Suzuki, Daisuke Fujimoto, Yuichi Hayashi (NAIST)
pp. 164 - 169
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.