Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICTSSL, CAS |
2024-01-25 13:15 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Talk]
Integrated circuits and digital calibration for high-speed high-resolution low-power A/D converters Takashi Oshima (Hitachi) CAS2023-89 ICTSSL2023-42 |
Given rapid advance of AI, acquisition of high-quality digital data from analog sensor signals is crucial than ever. A h... [more] |
CAS2023-89 ICTSSL2023-42 pp.34-39 |
SDM, ICD, ITE-IST [detail] |
2023-08-01 10:00 |
Hokkaido |
Hokkaido Univ. Multimedia Education Bldg. 3F (Primary: On-site, Secondary: Online) |
[Invited Talk]
Development of small-size high-resolution cyclic ADC with latest CMOS technology Takashi Oshima, Keisuke Yamamoto, Goichi Ono (Hitachi) SDM2023-35 ICD2023-14 |
A tiny but high-resolution cyclic ADC is presented with 7nm CMOS process. The 1.5bit/stage cyclic ADC performs fully dif... [more] |
SDM2023-35 ICD2023-14 pp.1-5 |
ED |
2022-04-21 11:20 |
Online |
Online |
A High Process Portability All Digital Time domain A/D Converter Takahiro Amada, Cong-Kha Pham (UEC Tokyo) ED2022-6 |
An all digital time domain A/D converter that can be largely synthesized has been proposed. The proposed circuit was des... [more] |
ED2022-6 pp.19-22 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 09:55 |
Online |
Online |
Column-Parallel Pipelined ADC with Ring Amplifier for High Speed and High Spatial Resolution CMOS Image Sensor Takashi Kojima (TUS), Toshinori Otaka, Yusuke Kameda, Takayuki Hamamoto (TUS) VLD2020-28 ICD2020-48 DC2020-48 RECONF2020-47 |
CMOS image sensor that can capture images with both high time resolution and high spatial resolution is required for ins... [more] |
VLD2020-28 ICD2020-48 DC2020-48 RECONF2020-47 pp.101-105 |
ICD, CPSY, CAS |
2018-12-23 09:30 |
Okinawa |
|
[Poster Presentation]
Digital Reduction of Third-Order Distortions in Time-Interleaved A/D Converters Keisuke Miyakoshi, Takao Kihara, Tsutomu Yoshimura (OIT) CAS2018-106 ICD2018-90 CPSY2018-72 |
Harmonic distortions appear at the output of an A/D converter (ADC) due to its nonlinearity, degrading the spurious-free... [more] |
CAS2018-106 ICD2018-90 CPSY2018-72 pp.107-108 |
ICD, CPSY |
2016-12-15 15:30 |
Tokyo |
Tokyo Institute of Technology |
[Poster Presentation]
Quadrature-phase-detection TDC for single-slope ADCs Sayuri Yokoyama, Sokuzin Na, Daisuke Uchida, Masayuki Ikebe, Tetsuya Asai, Masato Motomura (Hokkaido Univ.) ICD2016-81 CPSY2016-87 |
(To be available after the conference date) [more] |
ICD2016-81 CPSY2016-87 p.89 |
ICD, CPSY |
2016-12-16 15:20 |
Tokyo |
Tokyo Institute of Technology |
A Study of High Linearity Gm-cells for a Wide Bandwidth Delta Sigma Analog to Digital Convertor Tohru Kaneko, Yuya Kimura, Koji Hirose, Masaya Miyahara, Akira Matsuzawa (Tokyo Tech) ICD2016-97 CPSY2016-103 |
A Gm-cell integrator is preferred to an op-amp integrator for applying to a continuous-time $Delta Sigma$ analog to digi... [more] |
ICD2016-97 CPSY2016-103 pp.145-150 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 14:10 |
Osaka |
Ritsumeikan University, Osaka Ibaraki Campus |
A study on verification method of stochastic flash A/D converter with FPGA Shodai Isami, Toshimasa Matsuoka (Osaka Univ) CPM2016-88 ICD2016-49 IE2016-83 |
In a stochastic flash analog-to-digital converter utilizing a mismatch in device characteristics, system verification me... [more] |
CPM2016-88 ICD2016-49 IE2016-83 pp.63-67 |
ED, SDM |
2016-03-04 10:50 |
Hokkaido |
Centennial Hall, Hokkaido Univ. |
Analog-to-digital converter using amoeba-inspired neural network Uichi Ishida, Takao Waho (Sophia Univ.) ED2015-128 SDM2015-135 |
An amoeba-inspired neural-network A/D converter was designed using a switched-capacitor circuit. Dummy unit circuits, wh... [more] |
ED2015-128 SDM2015-135 pp.39-43 |
IT |
2015-07-14 10:30 |
Tokyo |
Tokyo Institute of Technology |
A new method for estimating a real-valued radix in an A/D converter. Kohei Oda, Yutaka Jitsumatsu (Kyushu Univ.) IT2015-30 |
A Pulse Code Modulation (PCM) and a Delta-Sigma ($DeltaSigma$) modulation are two major schemes for Analog-to-Digital (A... [more] |
IT2015-30 pp.77-82 |
CAS, CS |
2015-02-26 13:25 |
Tottori |
Tottori University |
Application of Hysteresis A/D Converter to Digital Communication Receivers and its Performance Evaluation Shota Fukushige, Osamu Muta (Kyushu Univ.), Daisuke Kanemoto (Univ. of Yamanashi), Hiroshi Furukawa (Kyushu Univ.) CAS2014-126 CS2014-98 |
In digital communication systems, analog-to-digital (A/D) converter (ADC) and related analog hardware
designs are impor... [more] |
CAS2014-126 CS2014-98 pp.37-42 |
RCS |
2014-10-17 10:10 |
Kanagawa |
Keio Univ. |
A Linearity Enhancement Technique and Its Performance Evaluation for A/D Converter Affected by Comparator Hysteresis in Single Carrier Transmission Shota Fukushige, Osamu Muta (Kyushu Univ.), Daisuke Kanemoto (Univ. of Yamanashi), Hiroshi Furukawa (Kyushu Univ.) RCS2014-175 |
To develop small size base and relay nodes, it is
desirable to improve power efficiency at power amplifier and reduce
... [more] |
RCS2014-175 pp.105-110 |
SR |
2014-05-22 16:15 |
Kanagawa |
Toshiba Education & Training Institute |
[Invited Talk]
Analog to Digital Conversion Technology for Software Defined Radio Akira Matsuzawa (Tokyo Inst. of Tech.) SR2014-11 |
A progress of Analog to Digital converter (ADC) technology is vital for realizing Software Defined Radios and Cognitive ... [more] |
SR2014-11 pp.69-76 |
CAS, NLP |
2013-09-26 15:55 |
Gifu |
Satellite Campus, Gifu University |
[Invited Talk]
Theoretical Analysis on Quantization Error of β-Encoder Takaki Makino (Univ. of Tokyo), Yukiko Iwata (Meteorol. College), Yutaka Jitsumatsu (Kyushu Univ.), Masao Hotta, Hao San (Tokyo City Univ.), Kazuyuki Aihara (Univ. of Tokyo) CAS2013-43 NLP2013-55 |
Theoretical evaluation of last{the quantization} error of the $beta$-encoder, that is a non-binary analog-to-digital con... [more] |
CAS2013-43 NLP2013-55 pp.41-44 |
RCS |
2013-04-19 14:15 |
Okinawa |
Ishigaki City Hall |
Hardware configuration and evaluation of one-bit quantization A/D converter for constant envelope modulation receivers Daisuke Kanemoto, Osamu Muta, Ryuta Fukunaga, Hiroshi Furukawa, Haruichi Kanaya, Keiji Yoshida (Kyushu Univ.) RCS2013-22 |
The authors have investigated a single carrier phase modulation (constant envelope modulation) system employing 1-bit qu... [more] |
RCS2013-22 pp.119-124 |
MW |
2013-03-08 11:20 |
Hiroshima |
Hiroshima Univ. |
[Special Invited Talk]
Current Status and Future Prospect for Analog and RF CMOS Integrated Circuits Akira Matsuzawa (Tokyo Inst. of Tech.) MW2012-185 |
Current status and future prospect for analog and RF CMOS integrated circuits will be discussed. The physical relationsh... [more] |
MW2012-185 p.147 |
CAS |
2013-01-29 10:15 |
Oita |
Beppu International Convention Center |
All-Digital Calibration of Time-Interleaved Analog-to-Digital Converter with Fast Convergence Takeshi Nozaki (Fujitsu Microelectronics Solutions LTD.), Masato Yoshioka (Fujitsu Lab), Souyou Setsu (Fujitsu Microelectronics Solutions LTD.), Sadayoshi Umeda (Fujitsu Semiconductor LTD.), Sanroku Tsukamoto (Fujitsu Lab) CAS2012-81 |
Time-interleaved (TI) analog-to-digital converters (ADCs) use several ADCs in parallel, and are effective way to substan... [more] |
CAS2012-81 pp.89-94 |
NLP |
2012-11-19 13:55 |
Miyagi |
Ishinomaki Senshu University |
Switched-Capacitor A/D Converters Based on Scale-Adjusted Ordinary and Negative β-Maps for IC implementation Akihito Toyoda, Yoshihiko Horio (Tokyo Denki Univ.), Kazuyuki Aihara (Univ. of Tokyo) NLP2012-77 |
β-encoders based on β-maps, including scale-adjusted ordinary and negative β-maps, have robustness against deviations in... [more] |
NLP2012-77 pp.7-12 |
NLP, CAS |
2012-09-20 15:55 |
Kochi |
Eikokuji Campus, University of Kochi |
[Invited Talk]
All-Digital Background Calibration for Time-Interleaved ADC Using Pseudo Aliasing Signal Junya Matsuno, Takafumi Yamaji, Masanori Furuta, Tetsuro Itakura (Toshiba) CAS2012-37 NLP2012-63 |
A new adaptive background calibration for gain mismatches and sample-time mismatches in a Time-Interleaved Analog-to-Dig... [more] |
CAS2012-37 NLP2012-63 pp.41-44 |
CAS |
2012-01-20 12:25 |
Fukuoka |
Kyushu Univ. |
[Invited Talk]
Technical Trend of Digitally Assisted A/D Converters Tatsuji Matsuura (Renesas) CAS2011-104 |
Abstract In spite of the numerous merits of advanced fine CMOS process/devices, when designing high performance ADCs, t... [more] |
CAS2011-104 pp.103-108 |