| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NLP | 2024-05-09 13:15 |
Kagawa | Kagawa Prefecture Social Welfare Center | Application of Unidirectionally Coupled Phase Oscillators in a Ring to Central Pattern Generator Takumi Yoshioka, Kentaro Takeda (Kagawa Univ.) |
(To be available after the conference date) [more] | |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2024-03-21 15:40 |
Nagasaki | Ikinoshima Hall (Primary: On-site, Secondary: Online) |
Low-Latency Request Process for an FPGA-based Cache Server Tianyi Yuan, Celimuge Wu, Tsutomu Yoshinaga (UEC)  CPSY2023-41 DC2023-107 |
As IoT-related technologies develop、 a growing number of devices are being connected to networks、 leading to an increase... [more] | CPSY2023-41 DC2023-107 pp.18-23 |
| RECONF, VLD | 2024-01-29 10:55 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Suppression of output bit width growth in AFE stochastic computing units Daiki Seto, Naoki Fujieda (Aichi Inst. Tech.) VLD2023-81 RECONF2023-84 |
Stochastic Computing (SC) is expected to be applied to fields such as image processing and machine learning. Amplitude a... [more] | VLD2023-81 RECONF2023-84 pp.7-12 |
| NLP | 2023-05-13 10:00 |
Fukushima | Kenshin Koriyama Cultural Center (Koriyama, Fukushima) | A Study of Ergodic Sequential Circuit Neuronal Networks for Use in Neuroprosthetic Devices Yuta Shiomi, Hiroyuki Torikai (Hosei Univ.) NLP2023-1 |
In this study, we propose a network based on an ergodic ordered circuit neuron model. We show that the proposed model c... [more] |
NLP2023-1 pp.1-4 |
| MBE, NC | 2022-12-03 15:50 |
Osaka | Osaka Electro-Communication University | A RISC-V Soft-core Processor with Custom VLIW Extension for Spiking Neural Network Accelerator Mingyang Li, Yuki Hayashida (Mie Univ.) MBE2022-40 NC2022-62 |
We aim to develop an embedded accelerator for spiking neural networks (SNN). In order to develop prototypes of various S... [more] | MBE2022-40 NC2022-62 pp.86-91 |
| RECONF | 2022-06-08 14:00 |
Ibaraki | CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
RECONF2022-19 |
Data has increased dramatically in recent years, and it is important to speed up parallel data processing using multiple... [more] | RECONF2022-19 p.86 |
| NC, MBE (Joint) |
2020-03-06 11:10 |
Tokyo | University of Electro Communications (Cancelled but technical report was issued) |
The Analysis of Associative Memory with Discrete Synapses Ryuta Sasaki, Toru Aonishi (Tokyo Tech) NC2019-108 |
Recently, as the increasing needs of the development of high-speed Ising computing specific hardware, it has been requir... [more] | NC2019-108 pp.187-192 |
| SR | 2019-05-31 10:00 |
Tokyo | Tokyo Big Sight | [Technology Exhibit]
QZSS short message SS-CDMA communication system
-- Evaluation of transmitting timing control error -- Hiroshi Oguma, Rei Kawai, Takumi Shimada (NIT, Toyama), Takeshi Asai (Next-Dimension), Mizuki Motoyoshi, Suguru Kameda, Noriharu Suematsu (Tohoku Univ.) SR2019-12 |
We have proposed Spread Spectrum Code Division Multiple Access (SS-CDMA) short message communication using Quasi-Zenith... [more] |
SR2019-12 pp.71-77 |
| VLD, IPSJ-SLDM | 2019-05-15 14:20 |
Tokyo | Ookayama Campus, Tokyo Institute of Technology | Approximate Computing Technique Using Memoization and Simplified Multiplication Yoshinori Ono, Kimiyoshi Usami (SIT) VLD2019-2 |
In embedded systems, approximate computing can strongly promote reduction of execution time and energy consumption in ex... [more] | VLD2019-2 pp.13-18 |
| DC | 2019-02-27 11:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An Efficient Approach to Recycled FPGA Detection Using WID Variation Modeling Foisal Ahmed, Michihiro Shintani, Michiko Inoue (NAIST) DC2018-77 |
Recycled field programmable gate arrays (FPGAs) make a significant threat to mission critical systems due to their perfo... [more] | DC2018-77 pp.37-42 |
| RECONF | 2018-09-18 14:50 |
Fukuoka | LINE Fukuoka Cafe Space | Data Flow Representation and its Applications to Machine Learning Accelerator Kazuki Nakada (Tsukuba Univ. of Tech.), Keiji Miura (Kwansei Gakuin Univ.) RECONF2018-32 |
Researches and development of machine learning accelerators have been rapidly progressing. It is becoming important to r... [more] | RECONF2018-32 pp.73-78 |
| RECONF | 2018-05-25 10:35 |
Tokyo | GATE CITY OHSAKI | Design of an MTJ-Based Multi-Functional Lookup Table Circuit Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu (Tohoku Univ.) RECONF2018-12 |
A multi-functional nonvolatile lookup table (LUT) circuit is described using a magnetic tunnel junction (MTJ) and CMOS h... [more] | RECONF2018-12 pp.59-64 |
| SIS | 2018-03-08 15:25 |
Aichi | Meijo Univ. Tempaku Campus | DNN:-MPC: A Hardware oriented Deep Neural Networks for Model Predictive Control Kentaro Honda, Naoki Iwaya (Kyutech), Teppei Hirotsu, Toshiaki Nakamura, Tatuya Horiguchi (HITACHI), Hakaru Tamukoh (Kyutech) SIS2017-60 |
Model Predictive Control (MPC) is one of the control systems, where it uses "predictive model" to control objects. Howev... [more] | SIS2017-60 pp.17-22 |
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-19 10:05 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Automatic Conversion from Snort PCRE to Verilog HDL Masahiro Fukuda, Yasushi Inoguchi (JAIST) VLD2017-78 CPSY2017-122 RECONF2017-66 |
In this paper, we present how to automatically convert Snort's PCRE (Perl Compatible Regular Expressions) into Verilog H... [more] | VLD2017-78 CPSY2017-122 RECONF2017-66 pp.95-100 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-06 13:00 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | FPGA Implementation of Pattern Matching of PCRE for NIDS and its Acceleration and Memory Saving Masahiro Fukuda, Yasushi Inoguchi (JAIST) RECONF2017-37 |
In this paper, we explain about a development of a tool to automatically generate a circuit for pattern matching of Perl... [more] | RECONF2017-37 pp.1-6 |
| EA, ASJ-H | 2017-08-09 15:45 |
Miyagi | Tohoku Univ., R. I. E. C. | [Invited Talk]
Realization of 252ch real-time processing of SENZI binaural sound-space sensing and reproduction method Shuichi Sakamoto (Tohoku Univ.), Satoshi Hongo (NIT, Sendai College), Takuma Okamoto (NICT), Yukio Iwaya (Tohoku Gakuin Univ.), Yo-iti Suzuki (Tohoku Univ.) EA2017-33 |
It is crucially important to reproduce accurate auditory spatial information around listeners for development of advance... [more] | EA2017-33 pp.39-40 |
| ED, SDM | 2017-02-24 11:50 |
Hokkaido | Centennial Hall, Hokkaido Univ. | A New Computing A New Computing Architecture Using Ising Spin Model Implemented on FPGA for Solving Combinatorial Optimization ProblemsArchitecture by Ising Spin Model for Solving Combinatorial Optimization Problems Implemented on FPGA Yusuke Kihara, Mitsuki Ito, Takanari Saito, Masayuki Shiomura, Shotaro Sakai, Jun-ichi Shirakashi (Tokyo Univ. of Agr. & Tech.) ED2016-134 SDM2016-151 |
Recently, the new computing architecture using Ising spin model has been attracting considerable attention. It is well k... [more] | ED2016-134 SDM2016-151 pp.23-28 |
| ICD, CPSY | 2016-12-15 10:05 |
Tokyo | Tokyo Institute of Technology | 56-Level Programmable Voltage Detector in Steps of 50mV for Battery Management Teruki Someya (Univ. of Tokyo), Kenichi Matsunaga, Hiroki Morimura (NTT), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo) ICD2016-51 CPSY2016-57 |
A programmable voltage detector (PVD) for the battery management is developed for the first time. In battery management ... [more] | ICD2016-51 CPSY2016-57 pp.1-5 |
| EMT, IEE-EMT | 2015-06-12 13:25 |
Tokyo | meeting room (1-5) of IEEJ | Design Study of FDTD/FIT Dataflow Machine for Wider Applications Hideki Kawaguchi (Muroran IT) EMT2015-5 |
For a purpose of practical use of microwave simulation technologies in industry applications, this paper presents a meth... [more] | EMT2015-5 pp.25-30 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-27 16:50 |
Oita | B-ConPlaza | Accelerating finite field arithmetic with a suitable word size Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa (Nagasaki Univ.) RECONF2014-44 |
In this paper, we implement architecture to speed up $GF(2^m)$ arithmetic in Elliptic Curve Cryptography(ECC) systems as... [more] | RECONF2014-44 pp.57-61 |
[Return to Top Page]