Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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VLD2019-94
A Method to Decide Row-Shift Decomposability of Index Generation Functions
Tsunesada Kyoichiro, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU)
pp. 1 - 6
VLD2019-95
A Pin-Pair Routing Method for Length Difference Reduction in Set-Pair Routing
Kunihiko Wada, Shimpei Sato, Atsushi Takahashi (TokyoTech)
pp. 7 - 12
VLD2019-96
An EVBDD-based Design Verification for Elementary Function Generators
Hiroto Fukuhara, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU)
pp. 13 - 18
VLD2019-97
An Automatic Method to Generalize Matrix-Vector Multiplication with Multiple Processors Considering the Efficiency of the Communications
Akihiro Goda, Masahiro Fujita (UT)
pp. 19 - 24
VLD2019-98
A Study of Arithmetic-Oriented Application Implementations for Via-Switch FPGA
Takashi Imagawa (Ritsumeikan Univ.), Yu Jaehoon (Tokyo Tech), Masanori Hashimoto (Osaka Univ.), Hiroyuki Ochi (Ritsumeikan Univ.)
pp. 25 - 29
VLD2019-99
MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation
Sosuke Akiba, Kimiyoshi Usami (SIT)
pp. 31 - 36
VLD2019-100
A Study of Dynamic Power Optimization by Latch Insertion for Asynchronous RTL Models
Shogo Semba, Hiroshi Saito (UoA)
pp. 37 - 42
VLD2019-101
Standard Cell Library of Stack Structured Cells to Reduce LSI Maximum Power Consumption
Yuki Imai (Saitama Univ.), Shinichi Nishizawa (Fukuoka Univ.), Kazuhito Ito (Saitama Univ.)
pp. 43 - 48
VLD2019-102
Estimation method of process variation using an IDDQ test and retention characteristics of flip-flop
Shinichi Nishizawa (Fukuoka Univ.), Kazuhito (Saitama Univ.)
pp. 49 - 52
VLD2019-103
Gate Sizing for Programmable Delay Elements on Post-Silicon Delay Tuning
Kota Muroi, Yukihide Kohira (UoA)
pp. 53 - 58
VLD2019-104
Thermal-Aware Clock Skew Scheduling Based on Two-Graph Approach
Mineo Kaneko (JAIST)
pp. 59 - 64
VLD2019-105
Pixel-based Mask Optimization with Lagrangian Relaxation and Boundary Flipping
Rina Azuma, Yukihide Kohira (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama (KIOXIA)
pp. 65 - 70
VLD2019-106
Machine Learning Based Lithography Hotspot Detection Method and Evaluation
Hidekazu Takahashi, Shimpei Sato, Atsushi Takahashi (Tokyo Tech)
pp. 71 - 76
VLD2019-107
Additional Training Data Generation for Lithography Hotspot Detection by Modifying Existing Training Data
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.)
pp. 77 - 82
VLD2019-108
A Preliminary Study of Spectrum-based Feature Vectors for Lithography Hotspot Detection
Masato Inagi, Gaku Kataoka, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.)
pp. 83 - 88
VLD2019-109
Monte Carlo Tree Search for routing of delivery drone
Kota Iwasaki, Yasuhiro Takashima (Univ. of Kitakyushu)
pp. 89 - 94
VLD2019-110
HCP: History-based Congestion Prediction Algorithm for Network-on-Chip
Zhenyu Hu, Michael Conrad Meyer (Waseda Univ.), Xin Jiang (NITKIT), Takahiro Watanabe (Waseda Univ.)
pp. 95 - 100
VLD2019-111
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor
Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.)
pp. 101 - 106
VLD2019-112
Fault-tolerant Design for Memristor Neural Network Using Checksum and Online Testing
Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue (NAIST)
pp. 107 - 112
VLD2019-113
stochasitc fast estimation of timing error induced circuit lifetime distribution
Hazuki Tomiyama, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.)
pp. 113 - 118
VLD2019-114
Hardware Control from Erlang Programs on Programmable SoC
Hidekazu Wakabayashi (Kwansei Gakuin Univ.), Nagisa Ishiura (Kwnsei Gakuin Univ.)
pp. 119 - 124
VLD2019-115
A Study Toward Binary Code Generation Using Neural Programmer-Interpreters
Masahiko Tsuyama, Ryusuke Miyamoto (Meiji Univ.)
pp. 125 - 130
VLD2019-116
A Study of A H/W-S/W Co-design Method to Make Effective Utilization of System Resources
Fumitoshi Karube, Shunsuke Tatsumi, Naoya Okada, Ryo Yamamoto, Yoshihiro Ogawa (MELCO), Abraham Goldsmith, Rien Quirynen (MERL)
pp. 131 - 136
VLD2019-117
[Memorial Lecture]
Small-Area and Low-Power FPGA-Based Multipliers using Approximate Elementary Modules
Yi Guo, Heming Sun, Shinji Kimura (Waseda Univ.)
p. 137
VLD2019-118
[Memorial Lecture]
A Tuning-Free Hardware Reservoir Based on MOSFET Crossbar Array for Practical Echo State Network Implementation
Yuki Kume, Song Bian, Takashi Sato (Kyoto Univ.)
pp. 139 - 144
VLD2019-119
[Memorial Lecture]
Workload-aware Data-eviction Self-adjusting System of Multi-SCM Storage to Resolve Trade-off between SCM Data-retention Error and Storage System Performance
Reika Kinoshita, Chihiro Matsui, Atsuya Suzuki, Shouhei Fukuyama, Ken Takeuchi (Chuo Univ.)
pp. 145 - 150
VLD2019-120
Approximate Floating Point Multiplier based on Shifting Addition Using Carry Signal from Second-Highest-Bit
Jie Li, Yi Guo, Shinji Kimura (Waseda Univ.)
pp. 151 - 156
VLD2019-121
Image edge detection using Latest Results based Approximate Computing
Hajime Ochi, Kimiyoshi Usami (SIT)
pp. 157 - 162
VLD2019-122
NA
Masashi Tawada, Nozomu Togawa (Waseda Univ.)
pp. 163 - 166
VLD2019-123
N/A
Yosuke Mukasa, Tomoya Wakaizumi, Shu Tanaka, Nozomu Togawa (Waseda Univ.)
pp. 167 - 172
VLD2019-124
NA
Sho Kanamaru, Kotaro Terada, Kazushi Kawamura, Shu Tanaka (Waseda Univ.), Yoshinori Tomita (Fujitsu Laboratories, Ltd), Nozomu Togawa (Waseda Univ.)
pp. 173 - 178
VLD2019-125
A Consideration on Efficient Anomaly Detection Based on Isolation Forest
Tsubasa Ikeda, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU)
pp. 179 - 184
VLD2019-126
(See Japanese page.)
pp. 185 - 190
VLD2019-127
Development of Traffic Monitoring System for Network Virtualization with Hardware Accelerator
Namiko Ikeda, Yuta Ukon, Shouko Ohteru, Shuhei Yoshida, Koyo Nitta (NTT)
pp. 191 - 196
VLD2019-128
Fundamental Study on Fault Analysis with Non-Uniform Faulty Values Caused at Fault Injection into Sequential Circuit
Takumi Okamoto, Daisuke Fujimoto (NAIST), Kazuo Sakiyama, Li Yang (UEC), Yu-ichi Hayashi (NAIST)
pp. 197 - 201
VLD2019-129
Fundamental Study on Side-Channel Attacks on Radio Communication ICs
Ryuuya Ichinose, Sakamoto Junichi, Tsutomu Matsumoto (Yokohama National Univ.)
pp. 203 - 207
VLD2019-130
Design Space Search for Faster Fp256 Elliptic Curve Cryptography
Kento Ikeda (Tokyo Univ.), Makoto Ikeda (d.lab)
pp. 209 - 214
VLD2019-131
A Test Generation Method for Resistive Open Faults Using Partial MAX-SAT solver
Hiroshi Yamazaki, Yuta Ishiyama, Tatsuma Matsuta, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.)
pp. 215 - 220
VLD2019-132
On evaluation of logic locking method based on Affine transformation
Yusuke Matsunaga (Kyushu Univ.)
pp. 221 - 225
VLD2019-133
NA
Tomotaka Inoue, Kento Hasegawa, Nozomu Togawa (Waseda Univ.)
pp. 227 - 232
VLD2019-134
A Study on Acceleration of Convolution using Bit-serial Dot Product Units with Zero-bit Skipping
Sora Isobe, Yoichi Tomioka (UoA)
pp. 233 - 238
VLD2019-135
A Study of FPGA Architectures for Deep Neural Network in Control devices
Ryo Yamamoto, Hidetomo Iwagawa, Yoshihiro Ogawa (Mitsubishi Electric)
pp. 239 - 244
VLD2019-136
Performance Evaluation of Echo State Networks with Hardware Reservoirs
Yuki Kume, Song Bian, Kenta Nagura, Takashi Sato (Kyoto Univ.)
pp. 245 - 250
VLD2019-137
Circuit Architecture Exploration for Optical Neural Network based on Integrated Nanophotonics
Naoki Hattori, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.), Jun Shiomi (Kyoto Univ.), Akihiko Shinya, Masaya Notomi (NTT)
pp. 251 - 256
VLD2019-138
Causes of Entropy Loss on Non-IID PUFs and their Entropy Estimations (1)
Mitsuru Shiozaki (Ritsumeikan Univ.), Yohei Hori (AIST), Shunsuke Okura, Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.)
pp. 257 - 262
VLD2019-139
Causes of Entropy Loss on Non-IID PUFs and their Entropy Estimations (2)
Mitsuru Shiozaki (Ritsumeikan Univ.), Yohei Hori (AIST), Shunsuke Okura, Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.)
pp. 263 - 268
VLD2019-140
Color Alteration Attacks on Lane Detection Function
Fumiki Miyazono, Naoki Yoshida, Tsutomu Matsumoto (Yokohama National Univ.)
pp. 269 - 274
VLD2019-141
An Inductive Impulse Self-Destructor in Sense-and-React Countermeasure Against Physical Attacks
Sho Tada, Kohei Matsuda, Makoto Nagata (Kobe Univ.), Kazuo Sakiyama (UEC), Noriyuki Miura (Kobe Univ.)
pp. 275 - 277
VLD2019-142
Side-channel leakage evaluation of cryptographic module by IC chip level power supply noise simulation
Kazuki Yasuda, Kazuki Monta, Akihiro Tsukioka, Noriyuki Miura, Makoto Nagata (Kobe Univ), Karthik Srinivasan, Shan Wan, Lagn Lin, Ying-Shiun Li, Norman Chang (ANSYS)
pp. 279 - 282
VLD2019-143
Light-Weight Design Methodology of Bulk Current Sensor Against Laser Fault Injection Attack on Cryptographic Processor
Yuki Yamashita, Kohei Matsuda, Makoto Nagata, Noriyuki Miura (Kobe Univ.)
pp. 283 - 284
VLD2019-144
Algorithm and Architecture Design for Fully Homomorphic Encryption Hardware
Shotaro Sugiyama, Makoto Ikeda (Tokyo Univ.)
pp. 285 - 290
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.