Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, HWS, ICD |
2024-02-29 11:15 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Design of RISC-V SoC with Post-quantum Encryption Algorithm Acceleration Jiyuan Xin, Makoto Ikeda (UTokyo) VLD2023-110 HWS2023-70 ICD2023-99 |
The foundational elements of the Internet of Things (IoT) are increasingly intricate and robust Systems-on-Chips (SoCs) ... [more] |
VLD2023-110 HWS2023-70 ICD2023-99 pp.66-71 |
ICTSSL, CAS |
2024-01-25 15:50 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
Design of high-frequency diplexer robust to variations in chip elements and conductor patterns based on cutoff frequency Shotaro Nakata, Koji Wada (UEC) CAS2023-95 ICTSSL2023-48 |
In this study, the diplexer composed of LPF (Low Pass Filter) and HPF (High Pass Filter) using chip elements and conduct... [more] |
CAS2023-95 ICTSSL2023-48 pp.60-65 |
LQE, OPE, CPM, EMD, R |
2023-08-25 10:00 |
Miyagi |
Tohoku university (Primary: On-site, Secondary: Online) |
[Invited Talk]
Status and Prospects of the Integrated Photonics Ecosystem Tsuyoshi Horikawa (Tokyo Tech) R2023-29 EMD2023-24 CPM2023-34 OPE2023-73 LQE2023-20 |
The current status and future evolution of the business ecosystem that supports the development of integrated photonics ... [more] |
R2023-29 EMD2023-24 CPM2023-34 OPE2023-73 LQE2023-20 pp.63-66 |
AP |
2023-02-15 10:20 |
Miyagi |
Tohoku University, Aobayama Campus (Primary: On-site, Secondary: Online) |
Study of a single point power supply for circularly polarized MACKEY Michinori Yoneda, Keito Yokoe, Shigeru Makino, Kenji Itoh, Masahiko Maeda (KIT) AP2022-199 |
MACKEY (Meta-surface inspired Antenna Chip developed by KIT EOE Laborator), a functional miniature antenna, was shown to... [more] |
AP2022-199 pp.11-16 |
OME |
2022-12-26 14:00 |
Okinawa |
OKINAWAKEN SEINENKAIKAN (Primary: On-site, Secondary: Online) |
Micro optical sensor based on surface mounting of optical elements on a CMOS chip
-- Toward the realization of a multi-point, real-time thrombus sensing system -- Nobutomo Morita, Wataru Iwasaki (AIST) |
[more] |
|
NLP |
2022-08-02 16:20 |
Online |
Online |
Esimation of Propagation Delay and Doppler Frequency based on Time-Domain and Frequency-Domain Spread Spectrum Signal. Yutaka Jitsumatsu (Tokyo Tech.) NLP2022-38 |
In Direct Sequence Spread Spectrum (DSSS) communications, a symbol interval is divided into chip intervals, and a pseudo... [more] |
NLP2022-38 pp.44-49 |
CPSY, DC, IPSJ-ARC [detail] |
2022-07-28 13:30 |
Yamaguchi |
Kaikyo Messe Shimonoseki (Primary: On-site, Secondary: Online) |
Preliminary evaluation of "SLMLET" chip with RISC-V MP and SLM reconfigurable logic Yosuke Yanai (Keio Univ.), Takuya Kojima (Tokyo Univ.), Hayate Okuhara (NUS.), Hideharu Amano (Keio Univ.), Masahiro Iida (Kumamoto Univ.) CPSY2022-8 DC2022-8 |
In recent years, processing power in IoT edge devices has been further improved. Therefore, a solution called a mixed FP... [more] |
CPSY2022-8 DC2022-8 pp.41-46 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-05 15:05 |
Hiroshima |
Satellite Campus Hiroshima |
Horizontal Wireless Bus for Free-Form SiP Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai (The Univ. of Tokyo) VLD2018-46 DC2018-32 |
We propose a wireless bus interface which connects chips integrated side by side wirelessly. Implementing large coils an... [more] |
VLD2018-46 DC2018-32 pp.43-48 |
SANE |
2017-08-24 13:50 |
Osaka |
OIT UMEDA Campus |
Deep Learning for Target Classification from SAR Imagery
-- Data Augmentation and Translation Invariance -- Hidetoshi Furukawa (Toshiba Infrastructure Systems & Solutions) SANE2017-30 |
This report deals with translation invariance of convolutional neural networks (CNNs) for automatic target recognition (... [more] |
SANE2017-30 pp.13-17 |
SDM, ICD, ITE-IST [detail] |
2017-08-01 13:00 |
Hokkaido |
Hokkaido-Univ. Multimedia Education Bldg. |
[Invited Lecture]
A 3.2ppm/℃ Second-Order Temperature Compensated CMOS On-Chip Oscillator Using Voltage Ratio Adjusting Technique Guoqiang Zhang, Kosuke Yayama, Akio Katsushima, Takahiro Miki (Renesas Electronics) SDM2017-39 ICD2017-27 |
A CMOS on-chip oscillator (OCO) for local interconnection network (LIN) bus is presented. The temperature dependence of ... [more] |
SDM2017-39 ICD2017-27 p.69 |
CPSY, IPSJ-ARC |
2016-10-06 10:00 |
Chiba |
Makuhari-messe |
[Technology Exhibit]
Security technologies for non-volatile memory in IoT devices
-- Mechanisms for on-chip MCU and off-chip memory system -- Mikio Hashimoto, Yoshiyuki Amanuma, Kentaro Umesawa, Ryuichi Koike, Jun Kanai, Naoko Yamada (Toshiba) CPSY2016-51 |
Non-volatile memory content modification is serious issues on IoT appliances, since evil effects continue over power cyc... [more] |
CPSY2016-51 pp.37-42 |
NC, NLP (Joint) |
2016-01-28 15:00 |
Fukuoka |
Kyushu Institute of Technology |
Off-Chip Learning Algorithm for Hardware Hand-Sign Recognition System Masayuki Tamaki, Hikawa Hiroomi (Kansai Univ) NC2015-57 |
This paper discusses a new off-chip learning algorithm for hardware hand sign recognition system. The hand sign
recogni... [more] |
NC2015-57 pp.7-12 |
CS, OCS (Joint) |
2016-01-22 13:55 |
Kagoshima |
Kagoshima University, Korimoto Campus, Inamori Auditorium |
2-Step Adaptive Equalization Scheme Based on Spectrum Monitoring implemented in Frequency-Domain Equalizer Hidemi Noguchi, Wakako Maeda, Emmanuel Le Taillandier de Gabory, Sadao Fujita, Tatsuya Nakamura, Jun'ichi Abe, Kiyoshi Fukuchi (NEC) OCS2015-99 |
Adaptive equalization techniques for mitigation of transmission impairments, such as spectrum narrowing in ROADM (Reconf... [more] |
OCS2015-99 pp.63-68 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 14:10 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
CSMA/CD and D-TDMA Hybrid Wireless 3D Bus Architecture Go Matsumura (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.) CPSY2015-69 |
(To be available after the conference date) [more] |
CPSY2015-69 pp.45-50 |
SCE |
2015-08-04 14:20 |
Kanagawa |
Yokohama National Univ. |
Design improvement of integrated quantum voltage noise source Masaaki Maezawa, Takahiro Yamada, Chiharu Urano (AIST) SCE2015-10 |
We present design improvement of integrated quantum voltage noise source (IQVNS) for high-performance Johnson noise ther... [more] |
SCE2015-10 pp.11-16 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 09:55 |
Kanagawa |
Hiyoshi Campus, Keio University |
NoC Architecture with Priority-based Packet Overtaking and Resource Control Shuhei Otsuki, Keigo Mizotani, Masayoshi Takasu (Keio Univ.), Daiki Yamazaki (Sony), Nobuyuki Yamasaki (Keio Univ.) VLD2014-117 CPSY2014-126 RECONF2014-50 |
With the recent advances in semiconductor technology, many transistors have been integrated into a single chip and Chip-... [more] |
VLD2014-117 CPSY2014-126 RECONF2014-50 pp.25-30 |
SCE |
2015-01-22 14:15 |
Tokyo |
Kikaishinkou-kaikan |
Development of Nondestructive Evaluation System Utilizing Robust HTS-SQUID Magnetometer in Unshielded Environment Yoshimi Hatsukade (Kinki Univ.), Saburo Tanaka (TUT) SCE2014-57 |
We have been developing robust HTS-SQUID magnetometers that can be operated stably in unshielded environments for practi... [more] |
SCE2014-57 pp.49-53 |
ICD |
2014-01-28 15:00 |
Kyoto |
Kyoto Univ. Tokeidai Kinenkan |
[Poster Presentation]
An ultra-low-voltage power-supply monitor circuit for wireless-powered microparticle manipulation system Ji Cui, Hirosuke Iwasaki, Yoshiaki Dei, Toshimasa Matsuoka (Osaka Univ.) ICD2013-105 |
This paper presents a voltage sensor (VS) circuit to monitor the supply voltage induced on wireless-pow-ered micropartic... [more] |
ICD2013-105 pp.15-18 |
SCE |
2014-01-23 11:00 |
Tokyo |
Kikaishinkou-kaikan Bldg. |
Robust HTS-SQUID Covered with HTS Film in Flip-Chip Configuration Yoshimi Hatsukade, Keisuke Yoshida, Takahiro Kage, Toshifumi Suzuki, Saburo Tanaka (Toyohashi Univ. of Tech.) SCE2013-39 |
In this paper, we describe recent results to develop robust HTS-SQUIDs based on bicystal SrTiO3 (STO) substrates and YBa... [more] |
SCE2013-39 pp.25-29 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 13:45 |
Kagoshima |
|
A 3-D NoC architecture using CSMA/CD bus for inter-chip wireless communication Takahiro Kagami, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2013-72 |
Wireless 3-D chip multiprocessors(CMPs), in which inductors with CMOS-based transceivers are used for an inter-chip wire... [more] |
CPSY2013-72 pp.77-82 |