Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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SDM2012-63
A Variation-Aware Low-Voltage Set-Associative Cache with Mixed-Associativity
Jinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
pp. 1 - 6
SDM2012-64
A 40-nm 256-Kb Sub-10 pJ/Access 8T SRAM with Read Bitline Amplitude Limiting (RBAL) Scheme
Shusuke Yoshimoto, Masaharu Terada, Yohei Umeki, Shunsuke Okumura (Kobe Univ.), Atsushi Kawasumi, Toshikazu Suzuki, Shinichi Moriwaki, Shinji Miyano (STARC), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
pp. 7 - 12
SDM2012-65
Self-Improvement of Cell Stability in SRAM by Post Fabrication Technique
Anil Kumar, Takuya Saraya (Univ. of Tokyo), Shinji Miyano (STARC), Toshiro Hiramoto (Univ. of Tokyo)
pp. 13 - 16
SDM2012-66
[Invited Lecture]
Comparison between power gating and DVFS from the view point of energy efficiency
Atsuki Inoue, Eiji Yoshida (Fujitsu Lab. Ltd.)
pp. 17 - 21
SDM2012-67
[Invited Talk]
Low Energy Dissipation Circuits with 0.5V Operation Voltage and Applications
Hirofumi Shinohara (STARC)
pp. 23 - 28
SDM2012-68
[Invited Lecture]
Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications
Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, The University of Tokyo)
pp. 29 - 32
SDM2012-69
Reduced Drain Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) MOSFETs
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo)
pp. 33 - 36
SDM2012-70
10nm-Diameter Tri-Gate Silicon Nanowire MOSFETs with Enhanced High-Field Transport and Vth Tunability through Thin BOX
Kensuke Ota, Masumi Saitoh, Chika Tanaka (Toshiba), Ken Uchida (TIT), Toshinori Numata (Toshiba)
pp. 37 - 42
SDM2012-71
3D Interconnect Technology by the Ultrawide-Interchip-Bus System for 3D Stacked LSI Systems
Fumito Imura, Shunsuke Nemoto, Naoya Watanabe, Fumiki Kato, Katsuya Kikuchi, Hiroshi Nakagawa (AIST), Michiya Hagimoto, Hiroyuki Uchida, Takashi Omori, Yasumori Hibi, Yukoh Matsumoto (TOPS Systems), Masahiro Aoyagi (AIST)
pp. 43 - 48
SDM2012-72
Intra/Inter Tier Substrate Noise Measurements in 3D ICs
Yasumasa Takagi, Yuuki Araga, Makoto Nagata (Kobe Univ.), Geert Van der Plas, Jaemin Kim, Nikolaos Minas, Pol Marchal, Michael Libois, Antonio La Manna, Wenqi Zhang, Julien Ryckaert, Eric Beyne (IMEC)
pp. 49 - 54
SDM2012-73
[Invited Talk]
STT-MRAM Development and Its Integration with BEOL Process for Embedded Applications
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Koji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, Chikako Yoshida (LEAP)
pp. 55 - 58
SDM2012-74
Scalable 3-D vertical chain-cell-type phase-change memory with 4F2 poly-Si diodes
Masaharu Kinoshita, Yoshitaka Sasago, Hiroyuki Minemura, Yumiko Anzai, Mitsuharu Tai, Yoshihisa Fujisaki, Shuichi Kusaba, Tadao Morimoto, Takashi Takahama, Toshiyuki Mine, Akio Shima, Yoshiki Yonamoto, Takashi Kobayashi (Hitachi)
pp. 59 - 63
SDM2012-75
Static noise margin and energy performance analyses of a nonvolatile SRAM cell using pseudo-spin-MOSFET
Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara (Tokyo Inst. Tech.)
pp. 65 - 70
SDM2012-76
Design Technology of stacked Type Chain PRAM Readout
Sho Kato, Shigeyoshi Watanabe (SIT)
pp. 71 - 76
SDM2012-77
Design of system LSI/memory with low power tunneling type transistor.
Ryosuke Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.)
pp. 77 - 81
SDM2012-78
[Invited Talk]
Nanocarbon Interconnects
-- Aiming to replace ultra-fine metal interconnects --
Akihiro Kajita, Makoto Wada, Tatsuro Saito, Masayuki Kitamura, Yuichi Yamazaki, Masayuki Katagiri, Ban Ito, Daisuke Nishide, Takashi Matsumoto, Atsunobu Isobayashi, Mariko Suzuki, Atsuko Sakata, Masahito Watanabe, Naoshi Sakuma, Tadashi Sakai (LEAP)
pp. 83 - 87
SDM2012-79
[Invited Talk]
A DC-Isolated Gate Drive IC with Drive-by-Microwave Technology
Shuichi Nagai, Noboru Negoro, Takeshi Fukuda, Yasufumi Kawai, Tetsuzo Ueda, Tsuyoshi Tanaka, Nobuyuki Otsuka, Daisuke Ueda (Panasonic)
pp. 89 - 92
SDM2012-80
[Invited Talk]
A Burst-Mode Laser Diode Driver with Burst-by-Burst Power Saving for 10G-EPON Systems
Hiroshi Koizumi, Minoru Togashi, Masafumi Nogawa, Yusuke Ohtomo (NTT)
pp. 93 - 98
SDM2012-81
[Invited Talk]
An Insole Pedometer With Piezoelectric Energy Harvester and 2V Organic Circuits
Koichi Ishida, Tsung-Ching Huang, Kentaro Honda, Yasuhiro Shinozuka, Hiroshi Fuketa, Tomoyuki Yokota (Univ. of Tokyo), Ute Zschieschang, Hagen Klauk (Max Planck Inst.), Gregory Tortissier, Tsuyoshi Sekitani, Makoto Takamiya, Hiroshi Toshiyoshi, Takao Someya, Takayasu Sakurai (Univ. of Tokyo)
pp. 99 - 104
SDM2012-82
A Fast-Transient-Response Digital Low-Dropout Regulator Comprising Thin-Oxide MOS Transistors in 40-nm CMOS process
Masafumi Onouchi, Kazuo Otsuga, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita (Renesas Electronics), Koichiro Ishibashi (Univ. of Electro-Comm.), Kazumasa Yanagisawa (Renesas Electronics)
pp. 105 - 110
SDM2012-83
0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost
Xin Zhang, Po-Hung Chen (Univ. of Tokyo), Yoshikatsu Ryu (STARC), Koichi Ishida (Univ. of Tokyo), Yasuyuki Okuma, Kazunori Watanabe (STARC), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo)
pp. 111 - 114
SDM2012-84
[Invited Talk]
High Efficient, Fast Load Tacking, Low EMI Wireless Power Delivery Circuits for Non-contact Memory Card
Hiroki Ishikuro, Ryota Shinoda, Kazutoshi Tomita, Yuya Hasegawa (Keio Univ.)
pp. 115 - 120
SDM2012-85
[Invited Talk]
A 1V 357Mb/s-Throughput TransferJet(TM) SoC with Embedded Transceiver and Digital Baseband in 90nm CMOS
Masahisa Tamura, Fumitaka Kondo, Katsumi Watanabe, Yasunori Aoki, Yusuke Shinohe, Koki Uchino, Yuhei Hashimoto, Fumihiro Nishiyama, Hiroaki Miyachi (Sony), Ikuho Nagase, Itaru Uezono, Rie Hisamura (Sony Semiconductor), Itaru Maekawa (Sony)
pp. 121 - 125
SDM2012-86
A Low Voltage High-Speed Inductive-Coupling Transceiver with Adaptive Pulse Width Controller Using Multi-Phase Oscillator
Yuki Urano, Takeshi Matsubara (Keio Univ.), Isamu Hayashi (STARC), Abul Hasan Johari, Kaoru Kohira, Teruo Jyo, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.)
pp. 127 - 132
SDM2012-87
An All 0.5V, 1Mbps, 315MHz OOK Transceiver with 38uW Carrier-Frequency-Free Intermittent Sampling Receiver and 52uW Class-F Transmitter in 40-nm CMOS
Shunta Iguchi (Univ. of Tokyo), Akira Saito (STARC), Kentaro Honda, Yunfei Zheng (Univ. of Tokyo), Kazunori Watanabe (STARC), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo)
pp. 133 - 138
SDM2012-88
A 40nm Ultra Low Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator
Ryota Sekimoto, Akira Shikata, Kentaro Yoshioka, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.)
pp. 139 - 144
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.