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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ED, SDM, CPM | 2024-05-24 14:20 |
Hokkaido | (Primary: On-site, Secondary: Online) |
Study on A Reconfigurable Problem Mapping Circuit for Amoeba-inspired Analog Electronic Solution Search System "Electronic Amoeba" Toksuhi Maruoka, Takato Yoshida, Yoko Shigematsu, Seiya Kasai (Hokkaido Univ.) |
(To be available after the conference date) [more] | |
| SCE | 2024-01-23 13:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
[Invited Talk]
Research on Novel Binary Neural Processing Elements Using Single Flux Quantum Circuits Zeyu Han, Zongyuan Li, Yamanashi Yuki, Yoshikawa Nobuyuki (Yokohama National Univ.)  SCE2023-23 |
Superconducting convolutional neural networks, based on single flux quantum (SFQ) circuits, hold significant potential d... [more] | SCE2023-23 pp.1-6 |
| MW | 2023-12-21 14:00 |
Shizuoka | Shizuoka University (Hamamatsu Campus) (Primary: On-site, Secondary: Online) |
[Special Talk]
Thoughts on the Development of Microwave Circuit Technologies for Advanced Radar and Satellite Communication Sub-Systems Moriyasu Miyazaki (Mitsubishi Electric) MW2023-148 |
The author has long been involved in the research and development of microwave and millimeter-wave circuit technologies ... [more] | MW2023-148 p.1 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-17 15:40 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
VLD2023-79 ICD2023-87 DC2023-86 RECONF2023-82 |
Muller’s C-element is a basic component often used to rendezvous signals in asynchronous circuit designs. A lot of imple... [more] | VLD2023-79 ICD2023-87 DC2023-86 RECONF2023-82 pp.255-260 |
| NLP, CAS | 2023-10-06 09:20 |
Gifu | Work plaza Gifu | A Simulation Comparison of Chaotic Circuits Under Different Memristor SPICE Models Yasuhiro Takahashi (Gifu Univ.) CAS2023-30 NLP2023-29 |
With the advent of memristor using titanium oxide thin films, that is, HP memristor, various SPICE models of HP memristo... [more] | CAS2023-30 NLP2023-29 pp.1-4 |
| SCE | 2023-08-08 11:25 |
Kanagawa | Yokohama National Univ. (Primary: On-site, Secondary: Online) |
Low-Cost Sorting Network Circuits Based on Temporal Logic Using Single Flux Quantum Circuits Zeyu Han, Zongyuan Li, Yamanashi Yuki, Yoshikawa Nobuyuki (YNU) SCE2023-5 |
Sorting is important in various applications such as image processing and switching systems. Hardware cost and power con... [more] | SCE2023-5 pp.22-27 |
| SCE | 2023-08-08 14:25 |
Kanagawa | Yokohama National Univ. (Primary: On-site, Secondary: Online) |
In-Depth Timing Characterization of the Adiabatic Quantum-Flux-Parametron Logic Gate Yu Hoshika (YNU), Christopher L. Ayala (IAS- YNU), Nobuyuki Yoshikawa (IAS - YNU) SCE2023-9 |
Adiabatic quantum-flux-parametron (AQFP) logic is a superconductor logic family and can operate at 5 GHz to 10 GHz with ... [more] | SCE2023-9 pp.45-48 |
| SCE | 2023-08-08 15:15 |
Kanagawa | Yokohama National Univ. (Primary: On-site, Secondary: Online) |
Design and Implementation of Neuron Circuit Using Adiabatic Quantum-Flux-Parametron Logic Tomoharu Yamauchi, Hao San (Tokyo City Univ.), Naoki Takeuchi (AIST/Yokohama National Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Olivia Chen (Tokyo City Univ.) SCE2023-11 |
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient，high performance in... [more] | SCE2023-11 pp.53-57 |
| EMM, BioX, ISEC, SITE, ICSS, HWS, IPSJ-CSEC, IPSJ-SPT [detail] | 2023-07-24 18:20 |
Hokkaido | Hokkaido Jichiro Kaikan | Implementation of Shor's algorithm for the discrete logarithm problem and experiments using the quantum computer simulator Kaito Kishi, Junpei Yamaguchi, Tetsuya Izu (Fujitsu Research), Noboru Kunihiro (Univ. of Tsukuba) ISEC2023-32 SITE2023-26 BioX2023-35 HWS2023-32 ICSS2023-29 EMM2023-32 |
Classical polynomial-time algorithms for solving the discrete logarithm problem (DLP) over a prime field have not been f... [more] | ISEC2023-32 SITE2023-26 BioX2023-35 HWS2023-32 ICSS2023-29 EMM2023-32 pp.119-126 |
| SANE | 2023-06-30 13:00 |
Kanagawa | JAXA Sagamihara Campus (Primary: On-site, Secondary: Online) |
Study of implementation of on-board SAR with FPGA Hiroai Asami (Mitsubishi Electric Corp.) SANE2023-18 |
We have studied to implement the image reconstruction processing of the synthetic aperture radar on the FPGA and to proc... [more] | SANE2023-18 pp.17-20 |
| CCS | 2023-03-26 10:55 |
Hokkaido | RUSUTSU RESORT | A Stochastic Memory for Ultralow-Power IoT Devices and its Subthreshold CMOS Circuit Implementation Seiya Muramatsu, Kohei Nishida, Kota Ando (Hokkaido Univ.), Megumi Akai-Kasaya (Osaka Univ./Hokkaido Univ.), Tetsuya Asai (Hokkaido Univ.) CCS2022-68 |
We propose a CMOS circuit implementation of a memory circuit for ultralow-power IoT devices based on stochastic computin... [more] | CCS2022-68 pp.31-35 |
| CCS | 2023-03-26 11:15 |
Hokkaido | RUSUTSU RESORT | Hardware Implementation of Predictive Coding Networks based on the Free Energy Principle Naruki Hagiwara, Takafumi Kunimi, Kota Ando (Hokkaido Univ.), Megumi Akai (Hokkaido Univ./Osaka Univ.), Tetsuya Asai (Hokkaido Univ.) CCS2022-69 |
Agents form generative models in the brain through perception and actions for adapting to the external environment. In t... [more] | CCS2022-69 pp.36-41 |
| HWS, VLD | 2023-03-02 09:55 |
Okinawa | (Primary: On-site, Secondary: Online) |
Implementation of power-outage tolerant VLSI system using asynchronous circuits Masashi Imai (Hirosaki Univ.) VLD2022-86 HWS2022-57 |
Re-initialization free systems which contain nonvolatile memory have been proposed in order to cope with power-outage. H... [more] | VLD2022-86 HWS2022-57 pp.79-84 |
| SCE | 2023-01-20 13:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Design and Implementation of Power Consumption Reduction Binary Neural Networks Using Adiabatic Quantum-Flux-Parametron Logic Tomoharu Yamauchi, Hao San (Tokyo City Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Olivia Chen (Tokyo City Univ.) SCE2022-14 |
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient，high performance in... [more] | SCE2022-14 pp.6-11 |
| SDM | 2022-11-11 10:30 |
Online | Online | [Invited Talk]
Implementation of Compact Model of a Metal Oxide Molecule Sensor for Self-Heating Control Yohsuke Shiiki (Keio Univ.), Shintaro Nagata, Tsunaki Takahashi, Takeshi Yanagida (Univ. Tokyo), Hiroki Ishikuro (Keio Univ.) SDM2022-72 |
Metal oxide molecule sensor has notable advantages of low-cost fabrication and integration. However, the molecule sensor... [more] | SDM2022-72 pp.40-43 |
| NC, MBE (Joint) |
2022-09-29 10:25 |
Miyagi | Tohoku Univ. (Primary: On-site, Secondary: Online) |
Analog circuit implementation of spiking neural networks and its application to time-series information processing Satoshi Moriya, Hideaki Yamamoto (Tohoku Univ), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato, Yoshihiko Horio (Tohoku Univ) NC2022-33 |
Edge computing in which low-dimensional signals such as sensor output are processed nearby sensors have become increasin... [more] | NC2022-33 p.5 |
| NC, IBISML, IPSJ-BIO, IPSJ-MPS [detail] | 2022-06-29 14:20 |
Okinawa | (Primary: On-site, Secondary: Online) |
LSI implementation of analog CMOS majority circuit for neural network applications Satoshi Ono, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato (Tohoku Univ.) NC2022-27 IBISML2022-27 |
Majority logic circuit is a circuit whose output is the majority value of multiple binary inputs. It can be applied to b... [more] | NC2022-27 IBISML2022-27 pp.189-192 |
| NLP, MICT, MBE, NC (Joint) [detail] |
2022-01-23 09:50 |
Online | Online | Analog-circuit design of STDP learning rule with linear decay and its LSI implementation Satoshi Moriya, Tatsuki Kato (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Hideaki Yamamoto, Shigeo Sato, Yoshihiko Horio (Tohoku Univ.) NC2021-40 |
Spiking neural networks (SNNs) are expected to be the next generation of information processing technology to reduce the... [more] | NC2021-40 p.44 |
| NLP, MICT, MBE, NC (Joint) [detail] |
2022-01-23 10:15 |
Online | Online | Analog CMOS implementation of majority logic for neuromorphic circuit applications Satoshi Ono, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato (Tohoku Univ.) NC2021-41 |
A majority logic circuit is a circuit whose output is the majority value of multiple binary inputs. In addition to its c... [more] | NC2021-41 pp.45-48 |
| IN, CCS (Joint) |
2021-08-05 14:25 |
Online | Online | Digital Implement of 3-layered Neural Networks with Stochastic Activation, Shunting Inhibition, and a Dual-rail Backpropagation Yoshiaki Sasaki, Seiya Muramatsu, Kohei Nishida, Megumi Akai-Kasaya, Tetsuya Asai (Hokkaido Univ.) CCS2021-16 |
Stochastic computing (SC) is an arithmetic technique that enables various operations to be performed with a small number... [more] | CCS2021-16 pp.7-13 |
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