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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, ISEC, SITE, ICSS, EMM, IPSJ-CSEC, IPSJ-SPT [detail] | 2018-07-26 14:10 |
Hokkaido | Sapporo Convention Center | Compensation of Temperature Induced Flipping-Bits in CMOS SRAM PUF by NMOS Body-Bias Xuanhao Zhang, Xiang Chen, Hanfeng Sun, Hirofumi Shinohara (Waseda Univ.)  ISEC2018-41 SITE2018-33 HWS2018-38 ICSS2018-44 EMM2018-40 |
PUF suffers from flipping-bits caused by temperature changes which degrade the stability of output. This paper proposes ... [more] | ISEC2018-41 SITE2018-33 HWS2018-38 ICSS2018-44 EMM2018-40 pp.333-336 |
| VLD, HWS (Joint) |
2018-02-28 17:45 |
Okinawa | Okinawa Seinen Kaikan | Evaluation of Soft Error Tolerance on Flip-Flop depending on 65 nm FDSOI Transistor Threshold-Voltage Mitsunori Ebara, Haruki Maruoka, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2017-104 |
Moore's Law has been miniaturizing integrated circuits, which can make a lot of high performance devices such as PCs an... [more] |
VLD2017-104 pp.91-96 |
| SDM, ICD, ITE-IST [detail] | 2017-08-01 13:50 |
Hokkaido | Hokkaido-Univ. Multimedia Education Bldg. | Evaluation of equivalent MOSFET reduced temperature dependence of threshold voltage Takuya Yamaguchi, Tatsuya Oku, Kawori Sekine (Meiji Univ.) SDM2017-41 ICD2017-29 |
A MOSFET has a temperature dependence of threshold voltage and mobility. In this paper, we focused on threshold voltage ... [more] | SDM2017-41 ICD2017-29 pp.77-82 |
| SDM, ICD, ITE-IST [detail] | 2017-08-02 11:35 |
Hokkaido | Hokkaido-Univ. Multimedia Education Bldg. | Gate Controlled Diode Characteristics of Super Steep Subthreshold slope PN-Body Tied SOI-FET for high Efficiency RF Energy Harvesting Shun Momose, Jiro Ida, Takayuki Mori, Takahiro Yoshida, Junpei Iwata, Takashi Horii, Takahiro Furuta, Takuya Yamada, Daichi Takamatsu, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2017-45 ICD2017-33 |
The gate controlled diode characteristics with our newly super steep subthreshold slope (SS) “PN-Bode Tied SOI FET” was ... [more] | SDM2017-45 ICD2017-33 pp.109-114 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 12:45 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | 2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting Tomoya Kimura, Hiroyuki ochi (Ritsumeikan Univ.) VLD2016-46 DC2016-40 |
This report proposes L1L5-type 2-step charge pump circuit that is suitable for boosting efficiently the subthreshold inp... [more] | VLD2016-46 DC2016-40 pp.13-18 |
| ICD, SDM, ITE-IST [detail] | 2016-08-02 09:00 |
Osaka | Central Electric Club | [Invited Talk]
Soft Error Immunity of Ultra-Low Voltage SRAM Masanori Hashimoto (Osaka Univ.) SDM2016-54 ICD2016-22 |
This paper discusses soft error immunity of near-threshold/subthreshold SRAM. In terrestrial environment, high-energy ne... [more] | SDM2016-54 ICD2016-22 pp.53-58 |
| SDM | 2016-06-29 10:40 |
Tokyo | Campus Innovation Center Tokyo | [Invited Lecture]
Design of SOI-FETs for Steep Slope Switching using Negative Capacitance in Ferroelectric Gate Insulators Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2016-34 |
This paper discusses a design of fully depleted silicon-on-insulator field-effect transistors with ferroelectric gate in... [more] | SDM2016-34 pp.9-13 |
| VLD | 2016-03-01 17:30 |
Okinawa | Okinawa Seinen Kaikan | [Memorial Lecture]
A Closed-Form Stability Model for Cross-Coupled Inverters Operating in Sub-Threshold Voltage Region Tatsuya Kamakari, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ.) VLD2015-131 |
A cross-coupled inverter which is an essential element of on-chip memory subsystems plays an important role in synchrono... [more] | VLD2015-131 p.117 |
| SDM | 2016-01-28 15:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Super Steep Subthreshold Slope PN-Body Tied SOI FET with Ultra Low Drain Voltage Jiro Ida (Kanazawa Institute of Technology) SDM2015-127 |
We have proposed the new type super steep subthreshold slope (SS) device of the PN-body tied SOI FET. The N region is in... [more] | SDM2015-127 pp.31-34 |
| ICD, ITE-IST | 2015-07-03 14:20 |
Kanagawa | National Defense Academy | [Invited Talk]
Circuit Design Techniques for Low Power Energy Harvesting System
-- Efficient DC-DC Boost Converter and Ultra-Low Power Digital Circuits -- Mitsuji Okada, Yuzuru Shizuku, Tetsuya Hirose (Kobe Univ.) ICD2015-22 |
In this paper, we present the circuit design techniques for an efficient DC-DC boost converter, a MPPT (Maximum Power Po... [more] | ICD2015-22 pp.47-52 |
| SDM | 2015-06-19 15:15 |
Aichi | VBL, Nagoya Univ. | Electrical properties of GIZO TFT with ultrathin Al2O3 insulators by PE-ALD method Kazunori Kurishima (Meiji Univ./NIMS), Toshihide Nabatame, Kazuhito Tsukagoshi, Akihiko Ohi, Toyohiro Chikyow (NIMS), Atsushi Ogura (Meiji Univ.) SDM2015-51 |
To investigate the influence of an Al2O3 layer on the electrical properties of Ga-In-Zn-O (GIZO) thin-film transistors (... [more] | SDM2015-51 pp.69-73 |
| ED | 2015-04-16 13:30 |
Miyagi | Laboratory for Nanoelectronics and Spintronics | Control of threshold voltage in printed organic thin-film transistors and their applications to circuits Rei Shiwaku, Yudai Yoshimura, Yasunori Takeda (Yamagata Univ.), Takashi Fukuda (TOSOH), Kenjiro Fukuda (Yamagata Univ./JST PRESTO), Daisuke Kumaki, Shizuo Tokito (Yamagata Univ.) ED2015-1 |
Control of threshold voltage (VTH) in organic thin film transistors (OTFTs) is an important technique which would realiz... [more] | ED2015-1 pp.1-5 |
| VLD | 2015-03-03 15:50 |
Okinawa | Okinawa Seinen Kaikan | [Memorial Lecture]
Microarchitectural-Level Statistical Timing Models for Near-Threshold Circuit Design Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ.) VLD2014-172 |
Near-threshold computing has emerged as a promising solution for drastically improving the energy efficiency of micropro... [more] | VLD2014-172 pp.109-114 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-29 17:40 |
Kanagawa | Hiyoshi Campus, Keio University | Analyzing the Impacts of Simultaneous Supply and Threshold Voltage Tuning on Energy Dissipation in VLSI Circuits Toshihiro Takeshita, Shinichi Nishizawa, AKM Mahfuzul Islam, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ) VLD2014-129 CPSY2014-138 RECONF2014-62 |
Simultaneous supply and threshold voltage tuning has a strong impact on the energy reduction of LSI circuits. Therefore,... [more] | VLD2014-129 CPSY2014-138 RECONF2014-62 pp.111-116 |
| SDM | 2015-01-27 15:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Accurate Prediction of PBTI Lifetime in N-type Fin-Channel High-k Tunnel FETs Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo, Shinichi Ohuchi, Junichi Tsukada, Hiromi Yamauchi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara (AIST) SDM2014-143 |
The positive bias temperature instability (PBTI) characteristics for n-type fin-channel tunnel FETs (TFETs) with high-k ... [more] | SDM2014-143 pp.33-36 |
| ICD, SDM | 2014-08-05 09:00 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | [Invited Talk]
Ultra-Low Voltage (0.1V) Operation of Threshold Voltage Self-Adjusting MOSFET and SRAM Cell Toshiro Hiramoto, Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Takuya Saraya (Univ. of Tokyo) SDM2014-71 ICD2014-40 |
A new Vth self-adjusting MOSFET operating at 0.1V is proposed, where Vth automatically decreases at on-state and increas... [more] | SDM2014-71 ICD2014-40 pp.51-54 |
| ICD, SDM | 2014-08-05 14:55 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | Initial Frequency Degradation on Ring Oscillators in 65-nm SOTB Process Caused by Plasma-Induced Damage Azusa Oshima, Ryo Kishida, Michitarou Yabuuchi, Kazutoshi Kobayashi (KIT) SDM2014-79 ICD2014-48 |
Reliability issues, such as plasma-induced damage (PID) and Bias Temperature Instability (BTI), become dominant on inte... [more] |
SDM2014-79 ICD2014-48 pp.93-98 |
| ICD, SDM | 2014-08-05 16:10 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | Area-Efficient and Low-Power SAR ADC with Dynamic Comparator Threshold Configuring by Source Voltage Shifting Masaki Yonekura, Kentaro Yoshioka, Hiroki Ishikuro (Keio Univ) SDM2014-82 ICD2014-51 |
An extremely low power and area efficient threshold configuring ADC (TC-ADC) is proposed. The threshold configuring comp... [more] | SDM2014-82 ICD2014-51 pp.109-113 |
| MW, OPE, EMT, MWP, EST, IEE-EMT [detail] | 2014-07-18 13:00 |
Hokkaido | Muroran Inst. of Tech. | A Novel Wide Dynamic Range Rectifier Design for WPT System Hiroto Sakaki, Fumito Kuroiwa, Masashi Muraguchi, Kenjiro Nishikawa (Kagoshima Univ.) MW2014-80 OPE2014-49 EST2014-41 MWP2014-38 |
Wireless Power Transfer (WPT) can be categorized into many method and Microwave wireless Power Transfer(MPT). Compared w... [more] | MW2014-80 OPE2014-49 EST2014-41 MWP2014-38 pp.191-196 |
| VLD | 2014-03-05 13:25 |
Okinawa | Okinawa Seinen Kaikan | Experiment and Analysis on Temperature Dependence of Delay and Energy for Subthreshold Circuits Hiroki Kushida, Youhua Shi, Nozomu Togawa (Waseda Univ.), Kimiyoshi Usami (Shibaura Inst. of Tech.), Masao Yanagisawa (Waseda Univ.) VLD2013-161 |
Low voltage design has been used in order to reduce the energy dissipation of mobile network equipment. However, as supp... [more] | VLD2013-161 pp.147-151 |
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