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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SANE | 2021-11-12 14:50 |
Online | Online | GPR data processing methods based on extrem gradient boosting algorithm to detect the backfill grouting of shield tunnel Xiongyao Xie, Li Zeng, Biao Zhou (Tongji Univ.)  SANE2021-59 |
Shield tunnel method is currently the most important method for tunnel excavation in soft soil areas. With the construct... [more] | SANE2021-59 pp.144-148 |
| SDM, ICD, ITE-IST [detail] | 2021-08-18 09:30 |
Online | Online | [Invited Talk]
Analog in-memory computing in FeFET based 1T1R array for low-power edge AI applications Daisuke Saito, Toshiyuki Kobayashi, Hiroki Koga (SONY), Yusuke Shuto, Jun Okuno, Kenta Konishi (SSS), Masanori Tsukamoto, Kazunobu Ohkuri (SONY), Taku Umebayashi (SSS), Takayuki Ezaki (SONY) SDM2021-36 ICD2021-7 |
Deep neural network (DNN) inference for edge AI requires low-power operation, which can be achieved by implementing mass... [more] | SDM2021-36 ICD2021-7 pp.33-37 |
| SDM | 2021-06-22 15:20 |
Online | Online | [Invited Lecture]
Development of TFET-based qubits enabling high-temperature operation to realize silicon-based quantum computing Takahiro Mori (AIST) SDM2021-25 |
Quantum computers have been attractive because they could realize large-scale and highly complicated calculations that c... [more] | SDM2021-25 p.16 |
| SDM | 2021-01-28 15:05 |
Online | Online | [Invited Talk]
Vertical Gate-All-Around Tunnel FETs Using InGaAs Nanowire/Si with Core-Multishell Structure Katsuhiro Tomioka, Hironori Gamo, Junichi Motohisa, Takashi Fukui (Hokkaido Univ.) SDM2020-52 |
We demonstrate vertical gate-all-around (VGAA) tunnel FETs (TFETs) using InGaAs core-multishell (CMS) nanowire (NW)/Si h... [more] | SDM2020-52 pp.13-16 |
| EMD | 2019-06-14 16:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Fluctuation Components of Contact Voltage at AgPd Brush and Au-plated Slip-ring System withLlubricant II Koichiro Sawa, Yoshitada Watanabe, Takahiro Ueno (NIT), Hiroyasu Masubuchi (NIDEC SERVO) EMD2019-9 |
The authors have been investigating the deterioration process of Au-plated slip-ring and Ag-Pd brush system with lubrica... [more] | EMD2019-9 pp.13-18 |
| ITS, IE, ITE-MMS, ITE-HI, ITE-ME, ITE-AIT [detail] | 2019-02-20 11:00 |
Hokkaido | Hokkaido Univ. | A Note on Estimation of Rock Drilling Energy Using Tunnel Working Face Images Kentaro Yamamoto, Ryosuke Harakawa, Takahiro Ogawa, Miki Haseyama (Hokkaido Univ.) |
In tunnel construction, it is important to grasp the geological condition of the rock to shorten the construction period... [more] | |
| SDM | 2018-11-08 11:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Proposal and device design of tunneling field effect transistor with oxide semiconductor and group-IV semiconductor Kimihiko Kato, Hiroaki Matsui, Hitoshi Tabata, Mitsuru Takenaka, Shinichi Takagi (Univ. Tokyo) SDM2018-66 |
A novel bilayer tunneling field effect transistor (TFET) employing an attractive material combination of oxide-semicondu... [more] | SDM2018-66 pp.11-16 |
| SDM | 2018-01-30 11:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Proposal and demonstration of oxide-semiconductor/(Si, SiGe, Ge) bilayer tunneling field effect transistor with type-II energy band alignment Kimihiko Kato, Hiroaki Matsui, Hitoshi Tabata, Mitsuru Takenaka, Shinichi Takagi (Univ. of Tokyo) SDM2017-92 |
A novel bilayer tunneling field effect transistor (TFET) employing an attractive material combination of oxide-semicondu... [more] | SDM2017-92 pp.5-8 |
| SDM, ICD, ITE-IST [detail] | 2017-07-31 12:00 |
Hokkaido | Hokkaido-Univ. Multimedia Education Bldg. | TCAD Simulation of C-TFET Circuit with Drain Offset Structure Hidehiro Asai, Takahiro Mori, Junich Hattori, Koichi Fukuda, Kazuhiko Endo, Takashi Matsukawa (AIST) SDM2017-35 ICD2017-23 |
We have performed TCAD simulation for a ring oscillator composed of complementary Tunnel Field Effect Transistors (C-TFE... [more] | SDM2017-35 ICD2017-23 pp.21-24 |
| MW (2nd) |
2017-06-14 - 2017-06-16 |
Overseas | KMUTT, Bangkok, Thailand | Possibility of Super Steep Subthreshold Slope Devices for High Efficiency RF Energy Harvesting of Ultra Low Power Input Jiro Ida, Kenji Itoh (KIT), Koichiro Ishibashi (UEC) |
The new diode technologies for RF energy harvesting of the ultralow power input was discussed. The limit of the conventi... [more] | |
| SDM | 2017-01-30 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Demonstrating Performance Improvement of Complementary TFET Circuits by ION Enhancement Based on Isoelectronic Trap Technology Takahiro Mori, Hidehiro Asai, Junichi Hattori, Koichi Fukuda, Shintaro Otsuka, Yukinori Morita, Shin-ichi O'uchi, Hiroshi Fuketa, Shinji Migita, Wataru Mizubayashi, Hiroyuki Ota, Takashi Matuskawa (ANational Institute of Advanced Industrial ScieIST) SDM2016-130 |
We improved the performance of a complementary circuit comprising Si-based tunnel field-effect transistors (TFETs) by us... [more] | SDM2016-130 pp.1-4 |
| ICD, SDM, ITE-IST [detail] | 2016-08-03 15:30 |
Osaka | Central Electric Club | Performance Enhancement of Tunnel FET by Negative Capacitance Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, Toshiro Hiramoto (Univ. of Tokyo) SDM2016-68 ICD2016-36 |
IoT devices in a sensor network require a new energy-efficient transistor which operates at ultralow voltage and power e... [more] | SDM2016-68 ICD2016-36 pp.127-130 |
| SDM | 2016-01-28 11:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Understanding of BTI for Tunnel FETs Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yuki Ishikawa, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Yongxun Liu, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Takashi Matsukawa, Meishoku Masahara, Kazuhiko Endo (AIST) SDM2015-122 |
(To be available after the conference date) [more] | SDM2015-122 pp.9-12 |
| SDM | 2016-01-28 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Van der Waals Junctions of Layered 2D Materials for Functional Devices Tomoki Machida, Rai Moritani, Yohta Sata, Takehiro Yamaguchi, Miho Arai, Naoto Yabuki, Sei Morikawa, Satoru Masubuchi (Univ. of Tokyo), Keiji Ueno (Saitama Univ.) SDM2015-123 |
Recent advances in transfer techniques of atomic layers have enabled one to fabricate van der Waals junctions of two-dim... [more] | SDM2015-123 pp.13-16 |
| ED | 2015-12-21 15:00 |
Miyagi | RIEC, Tohoku Univ | Extraction of intrinsic parameters in graphene-channel FET Gen Tamamushi, Kenta Sugawara, Akira Sato, Keiichiro Tashima, Hirokazu Fukidome, Maki Suemitsu, Taiichi Otsuji (Tohoku Univ.) ED2015-95 |
We fabricate and characterize the graphene-channel FETs (G-FETs) made of high-quality epitaxial graphene (EG) grown by t... [more] | ED2015-95 pp.25-30 |
| SDM | 2015-06-19 10:50 |
Aichi | VBL, Nagoya Univ. | [Invited Lecture]
Investigation of SiC MOSFETs with 3C/4H Different Poly-Type Junctions Muentaka Noguchi, Toshiaki Iwamatsu, Naruhisa Miura, Shuhei Nakata, Satoshi Yamakawa (Mitsubishi Electric) SDM2015-41 |
SiliconCarbide (SiC) have different poly-types, which shows various energy bandgap. This suggests the possibility of SiC... [more] | SDM2015-41 pp.17-20 |
| SDM | 2015-01-27 10:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
High Ion/Ioff Ge-source Ultrathin Body Strained-SOI Tunnel FETs
-- Impact of Channel Strain, MOS Interfaces and Back Gate on the Electrical Properties -- Minsoo Kim, Yuki K. Wakabayashi, Ryosho Nakane, Masafumi Yokoyama, Mitsuru Takenaka, Shinichi Takagi (The Univ. of Tokyo) SDM2014-137 |
High performance operation of Ge-source/strained-Si-channel hetero-junction tunnel FETs is demonstrated. It is found tha... [more] | SDM2014-137 pp.9-12 |
| SDM | 2015-01-27 15:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Accurate Prediction of PBTI Lifetime in N-type Fin-Channel High-k Tunnel FETs Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo, Shinichi Ohuchi, Junichi Tsukada, Hiromi Yamauchi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara (AIST) SDM2014-143 |
The positive bias temperature instability (PBTI) characteristics for n-type fin-channel tunnel FETs (TFETs) with high-k ... [more] | SDM2014-143 pp.33-36 |
| SDM | 2015-01-27 16:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of Less than 60 mV/decade and Very Low (pA/um) Off-Current on a Si CMOS Platform Yukinori Morita, Takahiro Mori, Koichi Fukuda, Wataru Mizubayashi, Shinji Migita, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2014-146 |
Complementary (p- and n-type) tunnel FinFETs operating with subthreshold slopes (SSs) of less than 60 mV/decade and very... [more] | SDM2014-146 pp.45-48 |
| SDM | 2014-11-06 10:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An Analytical Modeling for Asymmetric Double Gate Tunnel Field Effect Transistor Lv Hongfei, Shingo Sato, Yasuhisa Omura (Kansai Univ.), Abhijit Mallik (Univ. Calcutta) SDM2014-96 |
In this paper, a two-dimensional analytical potential model for the asymmetric double-gate tunnel field transistor (ADG-... [more] | SDM2014-96 pp.1-6 |
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